Chip Power Estimation Engineer

NVIDIA
Bengaluru
Workplace: HybridFull timeFunction: Energy & Utilities OperationsExperience: 2+ yearsEducation: mastersSkills: ["Communication","Teamwork","Problem-solving"]

Develop and correlate power estimation models and tools for NVIDIA chips and boards, including idle and IO power use cases. Work with architecture, design, synthesis, timing, circuit, and post-silicon teams to build estimation infrastructure, validate against measured silicon data, and calibrate models. Analyze chip configurations and process technology options to optimize power/performance, and contribute to Performance/Watt improvements for upcoming GPUs and SoCs.

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FursaFursa
NVIDIA
NVIDIA
1 hour ago

Chip Power Estimation Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live
Reposted: similar role first listed 7 months ago

Job Summary

Develop and correlate power estimation models and tools for NVIDIA chips and boards, including idle and IO power use cases. Work with architecture, design, synthesis, timing, circuit, and post-silicon teams to build estimation infrastructure, validate against measured silicon data, and calibrate models. Analyze chip configurations and process technology options to optimize power/performance, and contribute to Performance/Watt improvements for upcoming GPUs and SoCs.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Energy & Utilities Operations
Seniority: Mid level

Key Responsibilities

  • •Architect, develop, and correlate power estimation models and tools for NVIDIA chips.
  • •Architect and develop power models for use cases, idle power, and IO power.
  • •Build and integrate design tools based on the models, including testing methodology and infrastructure.
  • •Correlate and calibrate power models using measured silicon data.
  • •Analyze chip configuration and process technology options to optimize power/performance and contribute to performance-per-watt improvements.

Key Requirements

  • •B.Tech./M.Tech with 2+ years of experience in power/performance estimation and optimization.
  • •Strong VLSI power fundamentals, including transistor-level leakage and dynamic characteristics.
  • •Experience with low-power design techniques such as multi-Vt, clock gating, power gating, and DVFS.
  • •Background in power estimation methods, flows, and algorithms for chips.
  • •Good programming skills with Python preferred, including object-oriented design and development skills.
Experience:2+ yearsVLSILow power design
Education:Master's
Skills:CommunicationTeamworkProblem-solving
Tech Stack:PythonObject-oriented programmingPTPXEPSVLSIDVFSClock gatingPower gatingMulti VT

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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