Software Architect, Physical Verification
Cadence Design Systems
San Jose
Workplace: OnsiteFull timeFunction: Software EngineeringExperience: 10+ yearsEducation: mastersSkills: ["C","C++"]Design, develop, and validate software for physical verification of advanced semiconductor devices; tackle complex mathematical and geometric challenges; document solutions; collaborate with a distributed global team; contribute to code reviews and process improvements to advance Cadence's physical verification tools used in next-gen chip design and manufacturing. This role sits in the R&D group and offers impact across multiple nodes and teams, with opportunities to influence algorithms, performance, and reliability.

