Quantum Packaging Signal/Power Integrity (SI/PI) Engineer

Intel
United States
Workplace: OnsiteFull timeUSD 141,910 - 200,340 annuallyFunction: Energy & Utilities OperationsExperience: 3+ yearsEducation: mastersSkills: ["Communication","Presentation","Analytical thinking","Problem-solving","Collaboration","Adaptability"]

Model and simulate quantum computing packaging hardware, including redistribution layers, IC substrates, and silicon testchip routing. Own system-level SI/PI simulations end-to-end to ensure designs meet system requirements, collaborate with theory and hardware stakeholders on design needs (and sometimes requirements), and deliver/disseminate milestones via presentations and documentation. Stay current on packaging technologies by reading papers and attending conferences.

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Intel
Intel
1 day ago

Quantum Packaging Signal/Power Integrity (SI/PI) Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Model and simulate quantum computing packaging hardware, including redistribution layers, IC substrates, and silicon testchip routing. Own system-level SI/PI simulations end-to-end to ensure designs meet system requirements, collaborate with theory and hardware stakeholders on design needs (and sometimes requirements), and deliver/disseminate milestones via presentations and documentation. Stay current on packaging technologies by reading papers and attending conferences.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Energy & Utilities Operations
Seniority: Mid level

Key Responsibilities

  • •Model and simulate packaging hardware including redistribution layers (e.g., interposers, RDLs), IC substrates, and silicon testchip routing.
  • •Perform system-level end-to-end SI/PI modeling and simulation to ensure designs meet system-level requirements.
  • •Collaborate with stakeholders to meet design requirements, and in some projects help create requirements and novel packaging hardware.
  • •Deliver and disseminate design milestones to stakeholders.
  • •Communicate designs through presentations and relevant documentation while staying current with packaging technology developments via conferences and papers.

Pay and Benefits

Salary: USD 141,910 - 200,340 annually
Equity and Bonus:Equity
Perks:Health InsuranceRetirementPaid Leave

Key Requirements

  • •M.S. in Electrical Engineering, Physics, or related field plus 3+ years of SI/PI experience for packaging, silicon testchip, or related hardware; or a Ph.D. with academic/work experience in related areas.
  • •Experience with SI/PI modeling, simulation, and optimization using simulation tools such as SIwave, HFSS, ADS, and related software.
  • •Experience with SI/PI and thermal impact on IC substrate design choices.
  • •Design experience with large form factor IC substrates.
  • •Strong communication and presentation skills for technical and non-technical audiences, with the ability to collaborate across diverse teams.
Experience:3+ yearsQuantum computingSemiconductors
Education:Master's in Electrical Engineering, Physics (or related field)
Skills:CommunicationPresentationAnalytical thinkingProblem-solvingCollaborationAdaptability
Tech Stack:SIwaveHFSSADSRaptorH/XSI/PI modelingSimulationModeling and simulation

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
Glassdoor
Glassdoor: 3.8
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