Principal Engineer, ASIC Physical Design

Micron Technology
Minneapolis
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 15+ yearsEducation: bachelorsSkills: []

Lead ASIC physical design closure for Micron’s DRAM Tester Solutions group, spanning block-level and full-chip tasks from floorplanning through placement, CTS, routing, and tape-out. Own timing closure across modes and corners using industry-standard STA, and deliver power integrity signoff via IR/EM and power grid analysis. Develop and optimize APR flows and scripts to improve PPA, coordinating with cross-functional teams to drive successful technology-node execution.

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Micron Technology
Micron Technology
2 months ago

Principal Engineer, ASIC Physical Design

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Last checked: 18 hours agoStatus: Live

Job Summary

Lead ASIC physical design closure for Micron’s DRAM Tester Solutions group, spanning block-level and full-chip tasks from floorplanning through placement, CTS, routing, and tape-out. Own timing closure across modes and corners using industry-standard STA, and deliver power integrity signoff via IR/EM and power grid analysis. Develop and optimize APR flows and scripts to improve PPA, coordinating with cross-functional teams to drive successful technology-node execution.
Location: Minneapolis
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Lead block-level and full-chip physical design closure, including floorplanning, placement, CTS, routing, and tape-out.
  • •Drive timing closure across multiple modes and corners using industry-standard STA tools.
  • •Perform power integrity closure (IR/EM and power grid) to meet signoff requirements.
  • •Develop and optimize APR flows, scripts, and methodologies to improve PPA results.
  • •Coordinate subsystem or full-chip closure work with cross-functional teams to ensure successful tape-out.

Pay and Benefits

Perks:Health InsuranceDentalVisionPaid LeavePaid Holidays

Key Requirements

  • •Bachelor’s or Master’s degree (or equivalent experience) in Electrical Engineering, Electronics, or Computer Architecture.
  • •Minimum of 15 years of hands-on ASIC physical design implementation experience.
  • •Proven experience delivering multiple production tape-outs in advanced process nodes.
  • •Strong low-power design expertise, including UPF/CPF and multi-voltage systems.
  • •Proficiency in scripting for flow automation, such as Tcl, Perl, or Python.
Experience:15+ yearsSemiconductorASIC physical designDRAMMemoryEDA
Education:Bachelor's in Electrical Engineering, Electronics, or Computer Architecture
Tech Stack:ASIC physical designFull-chip physical designBlock-level physical designFloorplanningPlacementCTSRoutingTape-outSTATiming closureLow-power designUPF/CPFMulti-voltagePower integrityIR/EMPower grid closureAPR flowsPPA improvementsScriptingTcl

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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