3 months ago

Sr. Full Chip Physical Verification Engineer (Silicon Engineering)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Lead and execute full-chip physical verification flows for SpaceX Starlink silicon, delivering DRC, LVS, ESD, PERC, and antenna signoff with Calibre, ICV, or Pegasus. Develop and optimize verification flows for advanced nodes, interpret DRM updates, debug complex violations, coordinate tapeout readiness across block/top levels and IP teams, and collaborate with foundry and cross-disciplinary teams to improve efficiency.

Location: Sunnyvale

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools like Calibre, ICV, or Pegasus
•Develop, maintain, and optimize physical verification flows for advanced node SoCs
•Interpret and implement foundry DRM — translate rule updates into verified flow changes
•Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs
•Perform ESD verification — validate protection strategies, current paths, and CDM/HBM compliance

Key Requirements

•Bachelor’s degree in electrical engineering, computer engineering or computer science
•5+ years of ASIC and/or physical design flow development experience in industry
•Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation)
•Hands-on proficiency with Calibre, ICV (IC Validator), or Pegasus
•Excellent scripting skills (csh/bash, Perl, Python TCL, Makefile etc.)

Experience:5+ yearsSemiconductorASICSoCPhysical design

Education:Bachelor's

Skills:CalibreICVPegasusPythonTCLPerlMakefileShell scripting

Languages:English

Tech Stack:CalibreICVPegasusPythonTCLPerlMakefile

Company Brief

SpaceX

Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn

Loading job details...

Preparing the role view and application actions.

SpaceX

3 months ago

Sr. Full Chip Physical Verification Engineer (Silicon Engineering)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Location: Sunnyvale

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools like Calibre, ICV, or Pegasus
•Develop, maintain, and optimize physical verification flows for advanced node SoCs
•Interpret and implement foundry DRM — translate rule updates into verified flow changes
•Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs
•Perform ESD verification — validate protection strategies, current paths, and CDM/HBM compliance

Key Requirements

•Bachelor’s degree in electrical engineering, computer engineering or computer science
•5+ years of ASIC and/or physical design flow development experience in industry
•Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation)
•Hands-on proficiency with Calibre, ICV (IC Validator), or Pegasus
•Excellent scripting skills (csh/bash, Perl, Python TCL, Makefile etc.)

Experience:5+ yearsSemiconductorASICSoCPhysical design

Education:Bachelor's

Skills:CalibreICVPegasusPythonTCLPerlMakefileShell scripting

Languages:English

Tech Stack:CalibreICVPegasusPythonTCLPerlMakefile

Company Brief

SpaceX

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn