Interconnect Micro-architect/RTL Design Engineer

AMD
Austin
Workplace: HybridFull timeUSD 156,100 - 267,600 annuallyFunction: Software EngineeringEducation: mastersSkills: ["Structured problem-solving","Clear communication","Ownership","Collaboration"]

Design and implement interconnect (NoC/fabric) microarchitecture and synthesizable RTL for AMD’s scalable, coherent on-chip network. Work on high-speed communication across CPUs, GPUs, and accelerators for servers, AI platforms, client devices, and gaming systems. Collaborate with architecture, verification, and cross-functional engineering teams across Austin and global sites to optimize for power, performance, area, and timing, support validation, and debug pre- and post-silicon issues.

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FursaFursa
AMD
AMD
2 months ago

Interconnect Micro-architect/RTL Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live
Reposted: similar role first listed 8 months ago

Job Summary

Design and implement interconnect (NoC/fabric) microarchitecture and synthesizable RTL for AMD’s scalable, coherent on-chip network. Work on high-speed communication across CPUs, GPUs, and accelerators for servers, AI platforms, client devices, and gaming systems. Collaborate with architecture, verification, and cross-functional engineering teams across Austin and global sites to optimize for power, performance, area, and timing, support validation, and debug pre- and post-silicon issues.
Location: Austin
Workplace: Hybrid
Employment Type: Full time
Job Function: Software Engineering

Key Responsibilities

  • •Define microarchitecture for interconnect (fabric / network-on-chip) components.
  • •Develop and implement synthesizable RTL using Verilog/SystemVerilog.
  • •Optimize designs to meet power, performance, area, and timing goals.
  • •Contribute to scalable, coherent interconnect solutions across multiple product lines.
  • •Collaborate with architecture and verification teams; support unit-level validation and debug issues pre- and post-silicon.

Pay and Benefits

Salary: USD 156,100 - 267,600 annually

Key Requirements

  • •Experience with RTL design using Verilog or SystemVerilog.
  • •Background in interconnect, network-on-chip (NoC), or cache/memory subsystem design.
  • •Understanding of processor architecture, including coherency and memory systems.
  • •Knowledge of digital design fundamentals and high-speed hardware systems.
  • •Ability to debug RTL or hardware systems, including familiarity with power/performance/area tradeoffs.
Experience:Processor systemsInterconnectNetwork-on-chipHardware debugging
Education:Master's in Electrical or Computer engineering
Skills:Structured problem-solvingClear communicationOwnershipCollaboration
Languages:English
Tech Stack:RTLVerilogSystemVerilogNoCSynthesizable RTLAssertionsCoverage strategiesPythonCC++DFTX86ARMAI-assisted tools

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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