Senior Verification Engineer - ARM Fabric Unit Level

NVIDIA
India
Workplace: HybridFull timeFunction: Solutions Engineering & Sales EngineeringExperience: 4+ yearsEducation: bachelorsSkills: ["Debugging","Analytical skills","Interpersonal skills","Teamwork","Communication"]

Own HSIO IP unit-level verification for ARM-based distributed fabric used in automotive chips. Develop UVM-based verification test benches and methodologies, architect verification environments in SystemVerilog, and define test plans and infrastructure for modules, clusters, and systems. Build bus functional models, monitors, checkers, and scoreboards, implement functional coverage, and drive verification closure. Partner with architects, designers, FPGA, and post-silicon teams to ensure unit robustness.

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FursaFursa
NVIDIA
NVIDIA
2 months ago

Senior Verification Engineer - ARM Fabric Unit Level

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Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live

Job Summary

Own HSIO IP unit-level verification for ARM-based distributed fabric used in automotive chips. Develop UVM-based verification test benches and methodologies, architect verification environments in SystemVerilog, and define test plans and infrastructure for modules, clusters, and systems. Build bus functional models, monitors, checkers, and scoreboards, implement functional coverage, and drive verification closure. Partner with architects, designers, FPGA, and post-silicon teams to ensure unit robustness.
Location: India
Workplace: Hybrid
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop UVM-based verification test benches and methodologies to verify ARM architecture distributed fabric.
  • •Architect verification environments using SystemVerilog (SV) and UVM methodology.
  • •Define test plans, tests, and verification infrastructure for modules, clusters, and systems.
  • •Build reusable bus functional models, monitors, checkers, and scoreboards, and implement functional coverage.
  • •Coordinate verification closure and work with architects, designers, FPGA, and post-silicon teams to ensure robustness.

Key Requirements

  • •BTech or MTech in ECE, EE, CSE (or equivalent), with 4+ years of demonstrated ability in verification closure of complex units, sub-systems, or SoC-level verification.
  • •Proven experience in ARM architecture and protocols including AXI, AHB, and APB.
  • •Experience with modern verification methodologies such as SystemVerilog (SV) and UVM.
  • •Good debugging and analytical skills, with exposure to industry-standard verification tools for simulation and debug.
  • •Strong interpersonal skills, ability to collaborate with cross-cultural global teams, and excellent communication in a matrix organization.
Experience:4+ years
Education:Bachelor's in ECE, EE, or CSE
Skills:DebuggingAnalytical skillsInterpersonal skillsTeamworkCommunication
Tech Stack:ARMAXIAHBAPBSystemVerilogSVUVMFunctional coverageBus functional modelsMonitorsCheckersScoreboardsFPGAFormal verification

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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