Principal Layout Engineer-DPG-LPDDR

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Communications, PR & CommunityExperience: 15+ yearsEducation: bachelorsSkills: ["Technical leadership","Communication","Problem-solving","Cross-functional collaboration","Mentoring"]

Lead full-chip floor planning through integration, physical implementation, signoff, and tape-out execution for complex analog, mixed-signal, memory, and high-speed interfaces. Own physical verification closure (DRC/LVS/ERC/EMIR/reliability/manufacturability) and define scalable layout methodologies and best practices. Use AI/ML and agentic AI to improve layout productivity, automation, and decision-making, partnering with global teams while mentoring engineers and driving technical excellence.

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Micron Technology
Micron Technology
2 weeks ago

Principal Layout Engineer-DPG-LPDDR

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Last checked: 5 hours agoStatus: Live

Job Summary

Lead full-chip floor planning through integration, physical implementation, signoff, and tape-out execution for complex analog, mixed-signal, memory, and high-speed interfaces. Own physical verification closure (DRC/LVS/ERC/EMIR/reliability/manufacturability) and define scalable layout methodologies and best practices. Use AI/ML and agentic AI to improve layout productivity, automation, and decision-making, partnering with global teams while mentoring engineers and driving technical excellence.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Mid level

Key Responsibilities

  • •Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution.
  • •Drive layout implementation for complex analog, mixed-signal, memory, and high-speed interface designs.
  • •Own DRC, LVS, ERC, EMIR, reliability, and manufacturability closure.
  • •Define and scale layout methodologies, best practices, and execution frameworks.
  • •Use AI/ML/agentic AI and AI-assisted design/verification/debugging to improve layout productivity, design quality, automation, and decision-making.

Key Requirements

  • •B. Tech /M. Tech in Electrical Engineering, Electronics, VLSI, or related field.
  • •15+ years of hands-on custom layout experience.
  • •Proven success leading full-chip programs from concept through silicon tape-out.
  • •Deep expertise in Analog & Mixed-Signal, Memory, and Full-Chip floor planning/integration, including physical verification & signoff.
  • •Strong proficiency with Cadence Virtuoso, Calibre, StarRC, Totem, and related EDA tools; plus Python, SKILL, Tcl, and AI/Generative/Agentic AI for engineering automation.
Experience:15+ years
Education:Bachelor's in Electrical Engineering, Electronics, VLSI, or related field
Skills:Technical leadershipCommunicationProblem-solvingCross-functional collaborationMentoring
Tech Stack:Cadence VirtuosoCalibreStarRCTotemEDA toolsPythonSKILLTclAIMachine LearningGenerative AIAgentic AIDRCLVSERCEMIRPhysical verificationAutomationVerificationDebugging

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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