SoC Architecture and Design Engineer, Senior Member of Technical Staff (SMTS)

Micron Technology
Texas, California
Workplace: OnsiteFull timeUSD 177,000 - 334,000 annuallyFunction: Architecture & Urban PlanningExperience: 15+ yearsEducation: mastersSkills: ["Architecture","Debugging","Collaboration","Documentation","Design reviews"]

Design and implement RTL for SoC-level blocks for next-generation HBM logic die within Micron’s Heterogeneous Integration Group. Architect memory subsystems, integrate internal and third-party IP, and translate specifications into RTL while optimizing power/performance/area. Drive SoC integration tasks such as clocking, reset, power intent, and configuration, and support pre/post-silicon validation with root-cause analysis. Collaborate across verification, physical design, firmware, and manufacturing to ensure robust, manufacturable builds.

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FursaFursa
Micron Technology
Micron Technology
2 months ago

SoC Architecture and Design Engineer, Senior Member of Technical Staff (SMTS)

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Job Summary

Design and implement RTL for SoC-level blocks for next-generation HBM logic die within Micron’s Heterogeneous Integration Group. Architect memory subsystems, integrate internal and third-party IP, and translate specifications into RTL while optimizing power/performance/area. Drive SoC integration tasks such as clocking, reset, power intent, and configuration, and support pre/post-silicon validation with root-cause analysis. Collaborate across verification, physical design, firmware, and manufacturing to ensure robust, manufacturable builds.
Location: Texas, California
Workplace: Onsite
Employment Type: Full time
Job Function: Architecture & Urban Planning
Seniority: Mid level

Key Responsibilities

  • •Architect, design, and implement RTL for SoC-level blocks and subsystems used in HBM logic die.
  • •Architect memory subsystems, including memory IP selection/integration and bus/protocol selection with power/performance/area optimization.
  • •Integrate internal and third-party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY-adjacent logic).
  • •Participate in SoC-level integration including clocking, reset, power intent, and configuration infrastructure.
  • •Support pre-silicon validation and post-silicon bring-up, including root-cause analysis of silicon issues.

Pay and Benefits

Salary: USD 177,000 - 334,000 annually
Perks:Health InsuranceDentalVisionPaid LeavePaid Holidays

Key Requirements

  • •Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field with at least 15 years of experience in a related field.
  • •Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
  • •Experience with the RTL-to-GDS flow, including synthesis and static timing analysis and sign-off considerations.
  • •Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens.
  • •Programming/scripting experience (e.g., Python, TCL, Perl, or shell scripting).
Experience:15+ years
Education:Master's in electrical engineering or Computer Engineering
Skills:ArchitectureDebuggingCollaborationDocumentationDesign reviews
Tech Stack:SystemVerilogVerilogRTL-to-GDSSynthesisStatic timing analysisCadenceSynopsysSiemensPythonTCLPerlShell scriptingRTLIP integrationClockingResetPower intentConfiguration infrastructureRoot-cause analysisEDA tools

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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