Design Automation Engineer - Neuromorphic Computing

Intel
Phoenix, Santa Clara, Austin
Workplace: HybridFull timeUSD 122,440 - 232,190 annuallyFunction: QA, Test & Release EngineeringExperience: 4+ yearsEducation: bachelorsSkills: ["Adaptability","Process optimization","Cross-functional collaboration"]

Build and enhance Intel’s Loihi neuromorphic computing design automation tool flow, developing algorithms, scripts, and regression tests that improve quality and key KPIs across the silicon design lifecycle. Partner with RTL, verification, and physical design teams to automate RTL-to-emulation mappings and enable early software development. Work with asynchronous EDA concepts and standard EDA tools to take novel designs from concept to tape-out.

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Intel
Intel
4 days ago

Design Automation Engineer - Neuromorphic Computing

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Last checked: 3 hours agoStatus: Live

Job Summary

Build and enhance Intel’s Loihi neuromorphic computing design automation tool flow, developing algorithms, scripts, and regression tests that improve quality and key KPIs across the silicon design lifecycle. Partner with RTL, verification, and physical design teams to automate RTL-to-emulation mappings and enable early software development. Work with asynchronous EDA concepts and standard EDA tools to take novel designs from concept to tape-out.
Location: Phoenix, Santa Clara, Austin
Workplace: Hybrid
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Mid level

Key Responsibilities

  • •Enhance and maintain Loihi’s asynchronous EDA tool flow by implementing design automation algorithms, software tools/utilities, and regression tests.
  • •Provide automated solutions to RTL, verification, and physical design teams to reach product quality and target KPIs.
  • •Enable early software development by setting up a scalable framework mapping silicon designs to simulation and emulation.
  • •Write custom scripts to manipulate synthesis and physical design tools for low power/high performance custom designs.
  • •Extend tool flow capabilities to bring novel neuromorphic designs from concept through verification and emulation.

Pay and Benefits

Salary: USD 122,440 - 232,190 annually
Equity and Bonus:Equity
Perks:Health InsuranceRetirementPaid Leave

Key Requirements

  • •Bachelors with 4+ years (or Masters with 2+ years) developing and deploying production-quality silicon design tools, flows, and methods.
  • •4+ years developing and maintaining the ASIC tool suite (e.g., synthesis, place and route, ATPG, FEV, RV, STA, LVS/DRC).
  • •4+ years scripting with languages such as Perl, TCL, and/or Python.
  • •2+ years delivering multiple silicon tape-outs.
  • •Strong System-Verilog/System-C and object-oriented programming background (preferred).
Experience:4+ yearsSemiconductorsASICNeuromorphic computingEDAFPGA
Education:Bachelor's
Skills:AdaptabilityProcess optimizationCross-functional collaboration
Tech Stack:LoihiEDAAsynchronous designRTLASICSynthesisPlace and routeATPGFEVRVSTALVSDRCPerlTCLPythonSystem-VerilogSystem-CObject-oriented programmingFPGA

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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Glassdoor: 3.8
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