Principal, MTS, DRAM Systems Architect

Micron Technology
Boise
Workplace: OnsiteFull timeFunction: Software EngineeringExperience: 10+ yearsEducation: mastersSkills: ["Communication","Interpersonal skills","Mentoring","Multi-tasking","Problem-solving"]

Design, develop, optimize, verify, and provide technical support for high-speed DRAM IO and clocking IP circuits. Focus on equalization and bandwidth extension, analyzing IO impairments (clock jitter, duty cycle distortion) and their impact on DRAM system timing. Create modeling/simulation to evaluate circuit metrics at chip and system levels, collaborate on silicon-vs-simulation correlation, and work with process integration, data science, and EDA partners to advance design flow and optimization.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Micron Technology
Micron Technology
2 weeks ago

Principal, MTS, DRAM Systems Architect

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 13 hours agoStatus: Live

Job Summary

Design, develop, optimize, verify, and provide technical support for high-speed DRAM IO and clocking IP circuits. Focus on equalization and bandwidth extension, analyzing IO impairments (clock jitter, duty cycle distortion) and their impact on DRAM system timing. Create modeling/simulation to evaluate circuit metrics at chip and system levels, collaborate on silicon-vs-simulation correlation, and work with process integration, data science, and EDA partners to advance design flow and optimization.
Location: Boise
Workplace: Onsite
Employment Type: Full time
Job Function: Software Engineering
Seniority: Mid level

Key Responsibilities

  • •Innovate, design, optimize, and verify high-speed IO and clocking circuits used in new DRAM products.
  • •Apply high-speed circuit design techniques and enhance performance evaluation for timing and jitter sensitivity at circuit and full-chip levels.
  • •Develop accurate modeling, analysis, and simulation methods to connect circuit performance metrics to product specifications at full-chip and system level.
  • •Collaborate with Product Engineering and SI teams to compare silicon performance with simulations and support correlation activities.
  • •Work with process integration and transistor modeling teams, and with internal data science and EDA vendors, to improve AI-assisted design flow and circuit optimization.

Pay and Benefits

Perks:Health InsuranceDentalVisionPaid LeaveParental Leave

Key Requirements

  • •MSEE plus 10 years, or BSEE plus 12 years, designing high-speed IO interface, timing, and clocking circuits with proven silicon results.
  • •Ability to supervise layout work and understand good layout practices for high-speed circuits to minimize parasitic impacts.
  • •Strong interpersonal skills to convey sophisticated technical concepts verbally and in writing to design peers.
  • •Mental agility and ability to multi-task across multiple product types and parallel silicon validation efforts.
  • •Preferred: prior DRAM circuit design experience and experience with channel modeling/characterization, transceiver noise, and timing budget analysis.
Experience:10+ yearsSemiconductorsDRAMHigh-speed IOEDACircuit design
Education:Master's
Skills:CommunicationInterpersonal skillsMentoringMulti-taskingProblem-solving
Tech Stack:PERLPythonEDAAI/ML

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
Glassdoor
Glassdoor: 3.7
WebsiteLinkedIn