SpaceX

1 week ago

Sr. SI/PI Engineer - Serdes, Satellites (Starlink)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Own signal and power integrity (SI/PI) across the full lifecycle of Starlink payload hardware. Define SI/PI design, analysis, and verification processes, specify production screens, and lead troubleshooting and qualification from PCB manufacturing through satellite integration. Partner with RF, antenna, ASIC, mechanical/thermal, software, and production teams to architect novel channels, memory interfaces, and power delivery strategies using advanced simulation and lab test workflows.

Location: Palo Alto

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Seniority: Mid level

Key Responsibilities

•Specify, design, simulate, verify, qualify, define production screens for, and troubleshoot SI/PI aspects of advanced satellite hardware.
•Collaborate across RF, antenna, ASIC, packaging, mechanical, thermal, software, supply chain, and production teams to architect new products with novel channels and power delivery strategies.
•Derive top-level specifications for PCB materials and channel subcomponents, including transition structures from die bump to die bump.
•Drive component selection to accompany PDN designs and root-cause/fix SI/PI issues from PCB manufacturing, PCBA test, or satellite integration.
•Define SI/PI best practices, simulation workflows, test methodologies, signoff criteria, and lab equipment needs for Starlink payloads.

Travel: Low travel

Key Requirements

•Bachelor’s degree in electrical engineering, computer engineering, or physics.
•5+ years of industry experience designing circuits, electronic products, or hardware.
•2+ years of experience using 3D EM simulation tools and high-speed digital channel simulators (e.g., CST, HFSS, ADS).
•2+ years of research or industry experience with high-speed digital design or power integrity.
•Experience using SI/PI techniques for advanced high-speed channels, memory interfaces, and power delivery networks for hardware products.

Experience:5+ yearsSatellite hardwareHardware designHigh-speed digital designPower integritySERDES

Education:Bachelor's in Electrical engineering, computer engineering, or physics

Skills:Cross-functional collaborationTroubleshootingKnowledge sharing

Languages:English

Tech Stack:Signal IntegrityPower IntegritySI/PISERDESDSPsRetimersOptoelectronicsCSTHFSSADSDDR4LPDDR5GPDDR6QSPI NOREMMCPDNPythonC/C++EMI/EMC

Eligibility

Nationality:US National

Company Brief

SpaceX

Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn

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SpaceX

1 week ago

Sr. SI/PI Engineer - Serdes, Satellites (Starlink)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Location: Palo Alto

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Seniority: Mid level

Key Responsibilities

•Specify, design, simulate, verify, qualify, define production screens for, and troubleshoot SI/PI aspects of advanced satellite hardware.
•Collaborate across RF, antenna, ASIC, packaging, mechanical, thermal, software, supply chain, and production teams to architect new products with novel channels and power delivery strategies.
•Derive top-level specifications for PCB materials and channel subcomponents, including transition structures from die bump to die bump.
•Drive component selection to accompany PDN designs and root-cause/fix SI/PI issues from PCB manufacturing, PCBA test, or satellite integration.
•Define SI/PI best practices, simulation workflows, test methodologies, signoff criteria, and lab equipment needs for Starlink payloads.

Travel: Low travel

Key Requirements

•Bachelor’s degree in electrical engineering, computer engineering, or physics.
•5+ years of industry experience designing circuits, electronic products, or hardware.
•2+ years of experience using 3D EM simulation tools and high-speed digital channel simulators (e.g., CST, HFSS, ADS).
•2+ years of research or industry experience with high-speed digital design or power integrity.
•Experience using SI/PI techniques for advanced high-speed channels, memory interfaces, and power delivery networks for hardware products.

Experience:5+ yearsSatellite hardwareHardware designHigh-speed digital designPower integritySERDES

Education:Bachelor's in Electrical engineering, computer engineering, or physics

Skills:Cross-functional collaborationTroubleshootingKnowledge sharing

Languages:English

Tech Stack:Signal IntegrityPower IntegritySI/PISERDESDSPsRetimersOptoelectronicsCSTHFSSADSDDR4LPDDR5GPDDR6QSPI NOREMMCPDNPythonC/C++EMI/EMC

Eligibility

Nationality:US National

Company Brief

SpaceX

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn