IP/Subsystem Verification Lead

AMD
Hyderabad
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceExperience: 15+ yearsEducation: bachelorsSkills: ["Technical leadership","Problem-solving"]

Lead verification efforts to functionally verify complex RTL blocks and SoCs for next-generation Data Center networking ASICs. Work with the Network Technology Solutions Group to support product lines such as AI NICs and high-speed, low-latency networking for GPU clusters. Serve as a technical lead in a verification team, driving simulation-based verification, UVM/SystemVerilog test development, and verification coverage closure, with opportunities to apply formal verification and advanced debug techniques.

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FursaFursa
AMD
AMD
1 month ago

IP/Subsystem Verification Lead

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Source: Company careers pageValidated by: Fursa AI
Last checked: 6 hours agoStatus: Live

Job Summary

Lead verification efforts to functionally verify complex RTL blocks and SoCs for next-generation Data Center networking ASICs. Work with the Network Technology Solutions Group to support product lines such as AI NICs and high-speed, low-latency networking for GPU clusters. Serve as a technical lead in a verification team, driving simulation-based verification, UVM/SystemVerilog test development, and verification coverage closure, with opportunities to apply formal verification and advanced debug techniques.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance
Seniority: Mid level

Key Responsibilities

  • •Lead the verification efforts to functionally verify complex RTL blocks and SoCs for next-generation data center networking ASICs.
  • •Serve as a technical lead in a verification team.
  • •Build and execute simulation-based verification for ASIC/FPGA blocks and subsystems.
  • •Drive UVM-based verification in SystemVerilog, including framework execution and coverage closure.
  • •Coordinate and apply verification approaches such as simulation-based testing, formal verification (as advantage), and debug techniques.

Key Requirements

  • •Minimum 15 years of experience in verification of VLSI systems.
  • •Proven track record in simulation-based verification for ASIC or FPGA blocks and subsystems.
  • •Strong experience in UVM-based verification using SystemVerilog with deep framework understanding.
  • •Experience with verification coverage closure in an ASIC or FPGA project.
  • •Bachelor’s or Master’s degree in a related discipline (preferred).
Experience:15+ yearsASICFPGAVLSIData center networkingRTL verification
Education:Bachelor's
Skills:Technical leadershipProblem-solving
Languages:English
Tech Stack:RTLSoCASICFPGAVLSIUVMSystemVerilogSimulationVerification coverage closureFormal verificationSynopsys functional verificationPythonC/C++AI-based debug techniquesNetworking technologiesNetworking products

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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