Cadence Design Systems

3 months ago

Lead Product Engineer - Genus & Innovus

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 3 hours agoStatus: Live

Job Summary

Lead Product Engineer responsible for developing and maintaining Genus-to-Innovus digital implementation reference flows for Cadence foundry design service teams. You’ll support RTL synthesis, floorplanning, placement, CTS, routing, and physical optimization for production SoC designs, provide timing/power optimization guidance at advanced nodes, and ensure reusable, standardized flows across multiple foundry programs.

Location: Shanghai

Workplace: Onsite

Employment Type: Full time

Job Function: Administration & Executive Assistance

Key Responsibilities

•Develop and maintain Genus-to-Innovus digital implementation reference flows for foundry design service teams.
•Support RTL synthesis, floorplanning, placement, CTS, routing, and physical optimization for production SoC designs.
•Provide methodology guidance on timing closure, congestion mitigation, and power-aware implementation at advanced nodes.
•Support hierarchical and block-based implementation flows used in design services and multi-project environments.
•Diagnose and resolve convergence issues impacting timing, power, area, and routability in late design stages.

Key Requirements

•Experience developing and maintaining Genus-to-Innovus digital implementation reference flows for foundry design service teams.
•Support RTL synthesis, floorplanning, placement, CTS, routing, and physical optimization for production SoC designs.
•Provide methodology guidance on timing closure, congestion mitigation, and power-aware implementation at advanced nodes.
•Support hierarchical and block-based implementation flows used in design services and multi-project environments.
•Diagnose and resolve convergence issues impacting timing, power, area, and routability in late design stages.

Experience:SemiconductorsEDADigital design

Skills:GenusInnovusSDCUPFTemPusQuantusVoltusPegasusECORTLSynthesisPlace-and-routeTimingPower-aware design

Tech Stack:GenusInnovusSDCUPFTempusQuantusVoltusPegasusECORTLSynthesisPlace-and-route

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

3 months ago

Lead Product Engineer - Genus & Innovus

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 3 hours agoStatus: Live

Job Summary

Location: Shanghai

Workplace: Onsite

Employment Type: Full time

Job Function: Administration & Executive Assistance

Key Responsibilities

•Develop and maintain Genus-to-Innovus digital implementation reference flows for foundry design service teams.
•Support RTL synthesis, floorplanning, placement, CTS, routing, and physical optimization for production SoC designs.
•Provide methodology guidance on timing closure, congestion mitigation, and power-aware implementation at advanced nodes.
•Support hierarchical and block-based implementation flows used in design services and multi-project environments.
•Diagnose and resolve convergence issues impacting timing, power, area, and routability in late design stages.

Key Requirements

•Experience developing and maintaining Genus-to-Innovus digital implementation reference flows for foundry design service teams.
•Support RTL synthesis, floorplanning, placement, CTS, routing, and physical optimization for production SoC designs.
•Provide methodology guidance on timing closure, congestion mitigation, and power-aware implementation at advanced nodes.
•Support hierarchical and block-based implementation flows used in design services and multi-project environments.
•Diagnose and resolve convergence issues impacting timing, power, area, and routability in late design stages.

Experience:SemiconductorsEDADigital design

Skills:GenusInnovusSDCUPFTemPusQuantusVoltusPegasusECORTLSynthesisPlace-and-routeTimingPower-aware design

Tech Stack:GenusInnovusSDCUPFTempusQuantusVoltusPegasusECORTLSynthesisPlace-and-route

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor