Senior ASIC RTL Design Engineer, AI Hardware

Cerebras
Sunnyvale
Workplace: HybridFull timeUSD 200,000 - 290,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: mastersSkills: ["Collaboration","Debugging","Design closure focus","Cross-functional communication"]

Design and develop the next generations of the Cerebras Wafer Scale Engine (WSE), driving ASIC chip design from functional specification through RTL development and synthesis. Partner with PD, design verification, DFT, and software/system teams to achieve design closure and optimal performance for real-world AI workloads. Debug silicon bring-up issues across functional, timing, and power, while leveraging expertise in high-performance, power-efficient hardware and networking/data interfaces.

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FursaFursa
Cerebras
Cerebras
1 day ago

Senior ASIC RTL Design Engineer, AI Hardware

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Last checked: 18 hours agoStatus: Live

Job Summary

Design and develop the next generations of the Cerebras Wafer Scale Engine (WSE), driving ASIC chip design from functional specification through RTL development and synthesis. Partner with PD, design verification, DFT, and software/system teams to achieve design closure and optimal performance for real-world AI workloads. Debug silicon bring-up issues across functional, timing, and power, while leveraging expertise in high-performance, power-efficient hardware and networking/data interfaces.
Location: Sunnyvale
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Drive chip design across functional specification, micro-architecture, RTL development, and synthesis.
  • •Collaborate with PD teams to achieve design closure and meet PPA goals.
  • •Partner with design verification and DFT teams to improve functional and test coverage.
  • •Work with software and system teams to optimize performance and feature set.
  • •Debug silicon-level functional, timing, and power issues during bring-up.

Pay and Benefits

Salary: USD 200,000 - 290,000 annually
Equity and Bonus:Equity

Key Requirements

  • •Master’s degree in Computer Science, Electrical Engineering, or equivalent.
  • •8+ years of experience delivering complex, high-performance, high-quality RTL designs.
  • •Experience with front-end chip integration and third-party IP integration.
  • •Demonstrated experience in high-performance computing, GPU/CPU designs, machine learning, or related fields.
  • •Working knowledge of scripting tools such as Python and TCL.
Experience:8+ yearsHigh-performance computingGPU/CPU designsMachine learningASICSemiconductorAI hardware
Education:Master's in Computer Science, Electrical Engineering (or equivalent)
Skills:CollaborationDebuggingDesign closure focusCross-functional communication
Tech Stack:RTLSynthesisFunctional SpecificationMicro-architectureDesign verificationDFTPythonTCLTCP/IPRDMAEthernetPCIeSerdesFPGAPlace and RouteFloor planningTiming Analysis

Company Brief

Cerebras
Designs and builds wafer-scale AI accelerators and systems for large-scale deep learning workloads, delivering specialized hardware and software to accelerate model training and inference for enterprises and research institutions.
Industry: Hardware Devices
Company Size: Large (251 to 1,000 employees)
Growth: Scaleup
Headquarters: Sunnyvale, United States
Founded: 2016
WebsiteLinkedIn