Senior SOC Design Engineer

Drive SOC assembly and chip-level front-end design for Tegra SOCs, ensuring quality and correctness through cross-functional reviews. Own SOC execution across chip milestones by defining, tracking, and driving complex dependencies. Develop system-level methodologies, tools, and IPs to build efficient, scalable SOCs, and identify/improve inefficiencies in the front-end implementation process. Coordinate with teams across architecture, physical design, CAD, package design, and DFT.