Senior Mask Design Engineer – Hardware

NVIDIA
Taiwan
Full timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Cross-functional collaboration","Schedule management","Debugging","Problem-solving","Technical decision-making"]

Design and develop detailed physical layouts for silicon interposers used in NVIDIA products. Partner with the Package Technical Lead and I/O signal integrity engineers to deliver package solutions on tight schedules, run feasibility studies for size/cost/performance, and perform floorplanning, custom layout, and verification against design rules and netlists. Use Cadence tools for mask/layout work, propose trade-offs, and debug issues using verification and rule-checking flows.

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FursaFursa
NVIDIA
NVIDIA
1 day ago

Senior Mask Design Engineer – Hardware

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Last checked: 3 hours agoStatus: Live

Job Summary

Design and develop detailed physical layouts for silicon interposers used in NVIDIA products. Partner with the Package Technical Lead and I/O signal integrity engineers to deliver package solutions on tight schedules, run feasibility studies for size/cost/performance, and perform floorplanning, custom layout, and verification against design rules and netlists. Use Cadence tools for mask/layout work, propose trade-offs, and debug issues using verification and rule-checking flows.
Location: Taiwan
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Collaborate cross-functionally with the Package Technical Lead and I/O signal integrity/technology engineers to deliver product package solutions on tight schedules.
  • •Perform physical layout for silicon interposers using Cadence tools.
  • •Conduct design feasibility studies to evaluate package design goals for size, cost, and system performance.
  • •Study layout floorplans, implement custom layouts, and verify against design rules and netlists.
  • •Propose layout design trade-offs to the PTL to support resolution and implementation.

Key Requirements

  • •Hold a B.S. in Electrical Engineering or equivalent experience.
  • •Minimum 5+ years of proven Mask and Layout Design experience.
  • •Deep understanding of layout concepts in submicron CMOS technologies.
  • •Authority in Cadence layout tools, particularly Virtuoso.
  • •Experience running/debugging verification tools such as Calibre, ICV, and Thunder; proficiency in scripting languages like Perl, Python, and Skill.
Experience:5+ yearsSemiconductorCMOS
Education:Bachelor's in Electrical Engineering
Skills:Cross-functional collaborationSchedule managementDebuggingProblem-solvingTechnical decision-making
Tech Stack:CadenceVirtuosoCalibreICVThunderPerlPythonSkillDRCLVSIntegrity auto-routingAPD

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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