Senior FPGA / RTL Design Engineer - Signal Processing
Los Angeles, Irvine
Workplace: HybridFull timeUSD 125,000 - 195,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 6+ yearsEducation: bachelorsSkills: ["MATLAB","Verilog","VHDL","FPGA","Vivado","Xilinx","HDL","RTL","Testing","Timing analysis"]Senior FPGA RTL design engineer specializing in signal processing for Silvus/Motorola Solutions’ MIMO wireless systems. You’ll architect digital designs, implement fixed-point DSP blocks, develop RTL test benches, and ensure timing closure on Xilinx FPGAs while collaborating with RF and software teams in a hybrid Los Angeles-based role.
Loading
Loading job details...
Preparing the role view and application actions.

