Senior Design Engineer - Memory Subsystem

Design and develop micro-architecture and RTL for memory subsystem components used in GPUs and SoCs. Make architectural trade-offs to meet performance, power, and area goals, partnering with hardware architects, verification teams, and timing/VLSI and physical design groups to ensure correctness and routable, synthesis/timing-clean results. Prototype with FPGA and software teams, and drive post-silicon verification and debug for production impact.