Senior Functional Verification Engineer (Memory Subsystem)

AMD
Hyderabad
Full timeINR 3,338,160 - 4,768,800 annuallyFunction: Solutions Engineering & Sales EngineeringExperience: 7+ yearsEducation: bachelorsSkills: ["Technical leadership","Planning","Communication","Teamwork","Leadership"]

Lead functional verification for high-speed memory subsystem designs, including simulation and/or formal verification environments at block and system level. Drive verification strategy and execution for UCIe and DDR5/6 RLD3 memory controller designs, ensuring functional correctness, verification closure, and on-time delivery to programs. Provide technical leadership, influence memory controller design teams, and improve product quality using assertion- and metric-driven verification and verification management practices.

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FursaFursa
AMD
AMD
2 days ago

Senior Functional Verification Engineer (Memory Subsystem)

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Source: Company careers pageValidated by: Fursa AI
Last checked: 15 hours agoStatus: Live

Job Summary

Lead functional verification for high-speed memory subsystem designs, including simulation and/or formal verification environments at block and system level. Drive verification strategy and execution for UCIe and DDR5/6 RLD3 memory controller designs, ensuring functional correctness, verification closure, and on-time delivery to programs. Provide technical leadership, influence memory controller design teams, and improve product quality using assertion- and metric-driven verification and verification management practices.
Location: Hyderabad
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Design and develop simulation and/or formal verification environments for functional correctness at block and system level.
  • •Verify functional correctness of UCIe and DDR5/6 RLD3 memory controller designs, including modeling for calibration skew/jitter.
  • •Drive verification strategy and execution for high-performance memory IPs and/or SoC designs to ensure successful verification closure.
  • •Provide technical leadership for planning, execution, tracking, verification closure, and delivery to programs.
  • •Collaborate with and positively influence memory controller design teams to improve overall product quality.

Pay and Benefits

Salary: INR 3,338,160 - 4,768,800 annually

Key Requirements

  • •BS with 8+ years, or MS with 7+ years, or PhD with 7+ years in Electrical Engineering, Computer Engineering, or Computer Science.
  • •Hands-on experience verifying state-of-the-art memory controllers (HBM, DDR, LPDDR, UCIe) with strong understanding of controller protocols and calibration skew/jitter modeling.
  • •Experience developing UVM/OVM and/or Verilog/SystemVerilog testbenches and using simulation tools/debug environments such as Synopsys VCS and Cadence IES.
  • •Proven track record driving verification strategies and successful verification execution on high-performance memory controllers and/or SoC designs.
  • •Technical leadership experience planning, execution, tracking, verification closure, and delivery to programs (including teams of 9+ engineers).
Experience:7+ yearsMemory controllersSoC design
Education:Bachelor's
Skills:Technical leadershipPlanningCommunicationTeamworkLeadership
Languages:En-us
Tech Stack:UVMOVMVerilogSystemVerilogSynopsys VCSCadence IESAssertionsRegression managementFormal property checkingCadence JasperGate-level simulationPower verificationReset verificationContention checking

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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