NVIDIA 2027 Internships: Hardware Design for Test (DFT)

NVIDIA
Santa Clara
Workplace: OnsiteFull timeUSD 20 - 71 hourlyFunction: Hardware, Embedded & Systems EngineeringEducation: phdSkills: ["Strategic","Ambitious","Hard-working","Creative","Passionate"]

Work on high-impact projects within NVIDIA’s hardware teams during a 12-week full-time internship. You’ll contribute to design-for-test (DFT) development and verification activities such as scan chain design, ATPG, boundary scan, and pre-/post-silicon issue debug. The role is suited for MS/PhD students in electrical/computer engineering and related fields, using tools and scripting skills to improve hardware test readiness.

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FursaFursa
NVIDIA
NVIDIA
1 day ago

NVIDIA 2027 Internships: Hardware Design for Test (DFT)

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Last checked: 1 hour agoStatus: Live

Job Summary

Work on high-impact projects within NVIDIA’s hardware teams during a 12-week full-time internship. You’ll contribute to design-for-test (DFT) development and verification activities such as scan chain design, ATPG, boundary scan, and pre-/post-silicon issue debug. The role is suited for MS/PhD students in electrical/computer engineering and related fields, using tools and scripting skills to improve hardware test readiness.
Location: Santa Clara
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Intern level

Key Responsibilities

  • •Work on a 12-week full-time internship with projects that have measurable business impact.
  • •Contribute to DFT-related design work such as scan chain design and DFT planning.
  • •Support test development and verification activities including ATPG, boundary scan, and JTA.
  • •Help with pre-silicon and post-silicon issue debug to improve readiness and performance verification.
  • •Apply relevant programming, tooling, and systems knowledge as needed for the specific internship role.

Pay and Benefits

Salary: USD 20 - 71 hourly

Key Requirements

  • •Must be actively enrolled in a university pursuing an M.S. or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field for the full internship duration.
  • •Anticipated graduation date (month and year) must be clearly indicated on your resume/CV to be considered.
  • •Experience or coursework in Design for Test (DFT), Digital Design, Test Architecture and DFT Planning, and Static Timing Analysis (STA).
  • •Experience or knowledge in scan chain design and ATPG, boundary scan and JTA, and memory/logic BIST.
  • •Depending on role, prior experience or knowledge of programming skills/technologies such as Perl, TCL, C, C++, Python, Synopsys, TetraMAX, Cadence Modus, and Linux may be required.
Education:PhD / Doctorate in Electrical Engineering, Computer Engineering, or a related field
Skills:StrategicAmbitiousHard-workingCreativePassionate
Tech Stack:PerlTCLCC++PythonSynopsysTetraMAXCadence ModusLinux

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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