Intern: Software Engineering Jasper R&D

Cadence Design Systems
Belo Horizonte
Workplace: OnsitePart timeFunction: Software EngineeringSkills: ["Problem solving","Debugging","Communication"]

Join the Research & Development team in Belo Horizonte to work on Cadence’s Jasper formal verification tools. You’ll learn and help implement bug fixes and new features, practice object-oriented programming in C++ on Linux, and build automation flows using Tcl and Python. The role also includes developing algorithms and data structures and supporting software quality by creating tests, running regression suites, and collaborating with QA engineers.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Cadence Design Systems
Cadence Design Systems
1 month ago

Intern: Software Engineering Jasper R&D

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live
Reposted: similar role first listed 5 months ago

Job Summary

Join the Research & Development team in Belo Horizonte to work on Cadence’s Jasper formal verification tools. You’ll learn and help implement bug fixes and new features, practice object-oriented programming in C++ on Linux, and build automation flows using Tcl and Python. The role also includes developing algorithms and data structures and supporting software quality by creating tests, running regression suites, and collaborating with QA engineers.
Location: Belo Horizonte
Workplace: Onsite
Employment Type: Part time
Job Function: Software Engineering
Seniority: Intern level

Key Responsibilities

  • •Learn and help implement bug fixes and new features of Cadence’s Jasper formal verification tools.
  • •Practice object-oriented programming in C++ on Linux.
  • •Implement workflows using scripting languages such as Tcl and Python.
  • •Program algorithms and data structures for verification-related tasks.
  • •Support software quality assurance by creating tests, running regression tests, and collaborating with QA engineers.

Key Requirements

  • •Studying Computer Science, Electrical Engineering, or a related field.
  • •Availability to work in Belo Horizonte.
  • •Conclusion expected in December 2027 or August 2028.
  • •Strong verbal and written communication skills in English and Portuguese.
  • •Interest in learning C or C++ (programming), Tcl or Python (scripting), and hardware development languages like Verilog/SystemVerilog/VHDL.
Experience:EDASoftware development
Education:
Skills:Problem solvingDebuggingCommunication
Languages:EnglishPortuguese
Tech Stack:C++CLinuxTclPythonVerilogSystemVerilogVHDLObject-oriented programming

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
Glassdoor
Glassdoor: 3.9
WebsiteLinkedInGlassdoor