Senior Clock Architecture & Design Engineer
Austin
Workplace: OnsiteFull timeUSD 141,910 - 269,100 annuallyFunction: Architecture & Urban PlanningExperience: 5+ yearsEducation: bachelorsSkills: ["Python","Verilog","VHDL","SPICE","C","Scripting","TCL","Clock-tree-synthesis","CTS","EDA"]Lead the clock architecture for Intel’s next‑generation flagship CPUs, designing and implementing high‑frequency clock distribution networks, custom circuits, and CTS flows. Collaborate with architecture, physical design, and validation teams, shape design automation through EDA partnerships, and push performance and power efficiency while delivering scalable clock solutions that power millions of devices.
