NVIDIA

1 week ago

Verification Engineer, Emulation and Prototyping

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 22 hours agoStatus: Live

Job Summary

Build and optimize emulation and FPGA environments for next-generation GPUs, SoCs, NICs, and switches, making RTL emulation-friendly and running synthesis, place-and-route, and emulator compilation flows. Improve performance, generate bitstreams/images, and scale verification methodologies for extensive test plans. Bring up designs on hardware emulation platforms to drive complex debug, working with architects, verification teams, and software to enable pre-silicon development, validation, and performance analysis.

Location: Santa Clara

Workplace: Onsite

Employment Type: Full time

Job Function: Communications, PR & Community

Seniority: Mid level

Key Responsibilities

•Build emulation and FPGA environments by adapting RTL, partitioning designs, and executing synthesis, place-and-route, and emulator compilation flows.
•Improve emulation/FPGA performance by analyzing timing and performance bottlenecks and producing bitstreams/images.
•Create DV test benches that abstract C/SystemVerilog testbenches and run at FPGA speeds.
•Bring up designs on hardware emulation and FPGA platforms and lead complex debug and problem-solving activities.
•Scale emulation/FPGA verification methodology and validation infrastructure to support extensive test plans and high-performance debug.

Pay and Benefits

Salary: USD 136,000 - 264,500 annually

Key Requirements

•BS (or equivalent) in Electrical Engineering, Computer Engineering, or related fields with 5+ years of experience, or MS with 3+ years in FPGA prototyping and/or hardware emulation.
•Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools.
•Hands-on experience with simulators or emulators across vendors.
•Hands-on experience with emulation platforms such as Synopsys ZeBu, Siemens Veloce, or Cadence Z3, and familiarity with ProtoCompiler or Synplify Premier, and Xilinx Vivado.
•Extensive knowledge of writing SV/Verilog testbench code and developing DPI/PLI/SystemC-based interfaces and software infrastructures for high-speed validation and bring-up.

Experience:3+ years

Education:Master's in Electrical Engineering / Computer Engineering

Tech Stack:ASIC validationDVEmulationFPGARTLSynthesisPlace-and-routeEmulator compilationBitstreamsImagesTest benchesSystemVerilogVerilogCC++SV/VerilogPCIeCXLNVLINKUSB

Company Brief

NVIDIA

Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor

Loading job details...

Preparing the role view and application actions.

NVIDIA

1 week ago

Verification Engineer, Emulation and Prototyping

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 22 hours agoStatus: Live

Job Summary

Location: Santa Clara

Workplace: Onsite

Employment Type: Full time

Job Function: Communications, PR & Community

Seniority: Mid level

Key Responsibilities

•Build emulation and FPGA environments by adapting RTL, partitioning designs, and executing synthesis, place-and-route, and emulator compilation flows.
•Improve emulation/FPGA performance by analyzing timing and performance bottlenecks and producing bitstreams/images.
•Create DV test benches that abstract C/SystemVerilog testbenches and run at FPGA speeds.
•Bring up designs on hardware emulation and FPGA platforms and lead complex debug and problem-solving activities.
•Scale emulation/FPGA verification methodology and validation infrastructure to support extensive test plans and high-performance debug.

Pay and Benefits

Salary: USD 136,000 - 264,500 annually

Key Requirements

•BS (or equivalent) in Electrical Engineering, Computer Engineering, or related fields with 5+ years of experience, or MS with 3+ years in FPGA prototyping and/or hardware emulation.
•Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools.
•Hands-on experience with simulators or emulators across vendors.
•Hands-on experience with emulation platforms such as Synopsys ZeBu, Siemens Veloce, or Cadence Z3, and familiarity with ProtoCompiler or Synplify Premier, and Xilinx Vivado.
•Extensive knowledge of writing SV/Verilog testbench code and developing DPI/PLI/SystemC-based interfaces and software infrastructures for high-speed validation and bring-up.

Experience:3+ years

Education:Master's in Electrical Engineering / Computer Engineering

Tech Stack:ASIC validationDVEmulationFPGARTLSynthesisPlace-and-routeEmulator compilationBitstreamsImagesTest benchesSystemVerilogVerilogCC++SV/VerilogPCIeCXLNVLINKUSB

Company Brief

NVIDIA

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor