Software Engineer II: Hardware Verification R&D

Cadence Design Systems
Belo Horizonte
Workplace: OnsiteFull timeFunction: Software EngineeringExperience: 2+ yearsEducation: bachelorsSkills: ["Code reviews","Regression testing","Performance evaluation","Static analysis"]

Join the ATPG/DFT and Fault Emulation team in the HSV group to develop and maintain hardware test solutions. You’ll build new customer- or product-driven features—implementing code, unit/regression tests, static analysis, and performance evaluation—while improving existing functionality. Partner with Application Engineering for customer deployment support and work with Product Engineering and Product Validation to specify and test features using Cadence’s emulation environment and related tooling.

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Cadence Design Systems
Cadence Design Systems
1 day ago

Software Engineer II: Hardware Verification R&D

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Join the ATPG/DFT and Fault Emulation team in the HSV group to develop and maintain hardware test solutions. You’ll build new customer- or product-driven features—implementing code, unit/regression tests, static analysis, and performance evaluation—while improving existing functionality. Partner with Application Engineering for customer deployment support and work with Product Engineering and Product Validation to specify and test features using Cadence’s emulation environment and related tooling.
Location: Belo Horizonte
Workplace: Onsite
Employment Type: Full time
Job Function: Software Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop new features based on customer or Product Engineering requests, including functional specs, code, unit tests, regression tests, static analysis, performance evaluation, and code reviews.
  • •Maintain existing features through bug fixes, refactoring, and performance improvements.
  • •Support deployment of features on the customer side in collaboration with Application Engineering.
  • •Specify and test features in partnership with Product Engineering and Product Validation teams.
  • •Work as part of the ATPG/DFT and Fault Emulation team in the HSV group within the emulation environment.

Key Requirements

  • •Bachelor’s in computer science or computer engineering (or equivalent experience).
  • •2 years of software development experience.
  • •Strong object-oriented programming knowledge.
  • •Experience with git and perforce (and other tools).
  • •Knowledge of C++ and Unix environments.
Experience:2+ years
Education:Bachelor's
Skills:Code reviewsRegression testingPerformance evaluationStatic analysis
Languages:EnglishPortuguese
Tech Stack:C++GitPerforceUnixSTILTclPythonVerilogVHDLEDAVLSIDFTATPGFault EmulationFunctional SafetyISO26262PalladiumHardware verification

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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Glassdoor: 3.9
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