Staff Semiconductor Power Engineer (ICB4)

Own end-to-end power definition, analysis, and optimization for next-generation complex SoCs, from early architectural power budgeting through final silicon validation. Perform dynamic and leakage power analysis across RTL, gate-level, and post-layout using leading EDA tools. Build and maintain advanced power analysis flows and automation scripts to improve accuracy and turnaround time. Lead power reduction strategies (clock/power gating, DVFS) and collaborate on PDN sign-off, IR/EM analysis, and thermal/packaging constraints.