Design Engineer II

Cadence Design Systems
Hyderabad
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 2+ yearsEducation: bachelorsSkills: ["Leadership","Communication","Analytical thinking","Problem solving","Teamwork","Self-motivated"]

Own development, automation, and maintenance of EDA flows and scripts for physical implementation. Build TFM to optimize PPA for IPs and soft controllers, and perform PPA characterization and flow optimization for performance and power on advanced process nodes. Manage regression infrastructure to track RTL/flow quality and key design PPA. Implement digital design using Cadence EDA tools and create automation using AI to reduce turnaround time.

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FursaFursa
Cadence Design Systems
Cadence Design Systems
1 month ago

Design Engineer II

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 9 hours agoStatus: Live
Reposted: similar role first listed 3 months ago

Job Summary

Own development, automation, and maintenance of EDA flows and scripts for physical implementation. Build TFM to optimize PPA for IPs and soft controllers, and perform PPA characterization and flow optimization for performance and power on advanced process nodes. Manage regression infrastructure to track RTL/flow quality and key design PPA. Implement digital design using Cadence EDA tools and create automation using AI to reduce turnaround time.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Develop, automate, and maintain EDA flows and scripts for physical implementation
  • •Develop TFM to optimize PPA for IPs and soft controllers
  • •Perform PPA characterization and optimize flows for performance and power on advanced process nodes
  • •Manage regression infrastructure to track RTL/flow development quality and the PPA of key designs
  • •Implement digital design using Cadence EDA tools and develop automation scripts using AI to reduce turnaround time

Key Requirements

  • •MS/MTech/BE/BTech in Electronics with 2+ years of experience
  • •Physical design experience in an ASIC design environment
  • •Knowledge of the complete ASIC design flow including synthesis, physical design, timing analysis, power analysis, and formal verification
  • •Experience with logic synthesis and PPA optimization techniques, including Logic Equivalence Checks (LEC) debug for production designs
  • •Hands-on ability developing and debugging synthesis flows using EDA tools such as Genus and Fusion Compiler, plus solid Python/Tcl scripting and strong leadership/communication skills
Experience:2+ yearsASIC designEDAPhysical designAdvanced process nodes
Education:Bachelor's in Electronics
Skills:LeadershipCommunicationAnalytical thinkingProblem solvingTeamworkSelf-motivated
Tech Stack:EDA flowsScriptsTFMPPAGenusInnovusConformalLitmusTempusVoltusCertusPegasusFusion CompilerTSMCIntelSamsungRapidus FoundriesPythonTclLogic Equivalence Checks (LEC)

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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