Staff Design Engineer

Work on SOC physical design across block-level phases including floorplanning, partitioning, placement, clock tree synthesis, routing, and physical verification (LVS/DRC/ERC/Antenna). Own congestion, timing, and area closure while performing equivalence checks, STA, crosstalk delay and noise analysis, and power optimization. Implement timing and functional ECOs, support congestion resolution, and collaborate in a global team using tools such as Innovus/Encounter, ICC, Caliber, LEC, and Primetime.