HBM SoC RTL Design Engineer
United States
Workplace: OnsiteFull timeUSD 121,000 - 247,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 3+ yearsEducation: bachelorsSkills: ["Collaboration","Problem-solving","Root-cause analysis","Documentation"]Design and implement RTL for SoC-level blocks supporting HBM logic die, integrating internal and third-party IP to meet power, performance, area, and schedule targets. Collaborate with SoC architects to translate specifications into high-quality Verilog/SystemVerilog, support SoC-level integration (clocking, reset, power intent), and assist with pre-silicon validation and post-silicon bring-up including root-cause analysis. Drive documentation and design reviews while coordinating with verification, physical design, firmware, test, and manufacturing teams.
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