Anduril

3 weeks ago

Senior Digital Design Engineer, Air Dominance and Strike

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Design and integrate RTL for FPGA and SoC platforms used in high-performance embedded systems, avionics, and mission-critical hardware. Own work from requirements and microarchitecture through RTL implementation, simulation, synthesis, timing closure, lab bring-up, and system integration. Debug functional, timing, and integration issues on hardware, collaborate across hardware/software/systems/verification teams, and contribute to design reviews, code reviews, and reusable development workflows.

Location: United States

Workplace: Onsite

Employment Type: Full time · Permanent

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Design and implement RTL in VHDL, Verilog, or SystemVerilog for FPGA and SoC-based systems.
•Translate system and hardware requirements into microarchitecture, interface definitions, and implementation plans.
•Own FPGA designs or major functional blocks from architecture through integration, timing closure, and lab debug.
•Develop and execute simulation, synthesis, and implementation flows, and debug functional, timing, and integration issues on hardware.
•Support board bring-up, lab validation, and system integration on target platforms while collaborating with cross-functional engineering teams and participating in reviews and documentation.

Pay and Benefits

Salary: USD 132,000 - 198,000 annually

Equity and Bonus:Equity

Perks:Health InsuranceRecovery

Key Requirements

•Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
•4+ years of FPGA, ASIC, or closely related digital design experience.
•Proficiency in VHDL and/or Verilog/SystemVerilog.
•Hands-on experience with simulation, synthesis, implementation, and timing closure on modern FPGA platforms.
•Eligible to obtain and maintain an active U.S. Secret security clearance.

Experience:4+ years

Education:Bachelor's in Electrical Engineering, Computer Engineering, or related field

Skills:CommunicationDebugging

Tech Stack:FPGASoCRTLVHDLVerilogSystemVerilogSimulationSynthesisTiming closureLinuxGitTclPythonAMD (Xilinx)Intel/AlteraLatticeVitisEthernetPCIeJESD204

Eligibility

Security Clearance:Secret

Company Brief

Anduril

Designs and builds advanced defense systems combining autonomous aircraft, sensors, and AI-driven software for military and national security applications, focused on modernizing battlefield capabilities and distributed sensing.

Industry: Defense Technology

Company Size: Enterprise (1,001+ employees)

Growth: Scaleup

Valuation: Unicorn (USD 1B+)

Funding: Series E+

Headquarters: Costa Mesa, United States

Founded: 2017

Website LinkedIn

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Anduril

3 weeks ago

Senior Digital Design Engineer, Air Dominance and Strike

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Location: United States

Workplace: Onsite

Employment Type: Full time · Permanent

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Design and implement RTL in VHDL, Verilog, or SystemVerilog for FPGA and SoC-based systems.
•Translate system and hardware requirements into microarchitecture, interface definitions, and implementation plans.
•Own FPGA designs or major functional blocks from architecture through integration, timing closure, and lab debug.
•Develop and execute simulation, synthesis, and implementation flows, and debug functional, timing, and integration issues on hardware.
•Support board bring-up, lab validation, and system integration on target platforms while collaborating with cross-functional engineering teams and participating in reviews and documentation.

Pay and Benefits

Salary: USD 132,000 - 198,000 annually

Equity and Bonus:Equity

Perks:Health InsuranceRecovery

Key Requirements

•Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
•4+ years of FPGA, ASIC, or closely related digital design experience.
•Proficiency in VHDL and/or Verilog/SystemVerilog.
•Hands-on experience with simulation, synthesis, implementation, and timing closure on modern FPGA platforms.
•Eligible to obtain and maintain an active U.S. Secret security clearance.

Experience:4+ years

Education:Bachelor's in Electrical Engineering, Computer Engineering, or related field

Skills:CommunicationDebugging

Tech Stack:FPGASoCRTLVHDLVerilogSystemVerilogSimulationSynthesisTiming closureLinuxGitTclPythonAMD (Xilinx)Intel/AlteraLatticeVitisEthernetPCIeJESD204

Eligibility

Security Clearance:Secret

Company Brief

Anduril

Industry: Defense Technology

Company Size: Enterprise (1,001+ employees)

Growth: Scaleup

Valuation: Unicorn (USD 1B+)

Funding: Series E+

Headquarters: Costa Mesa, United States

Founded: 2017

Website LinkedIn