Senior Front End Design Engineer (Microarchitecture)

Design and develop the next generations of the Cerebras Wafer Scale Engine (WSE), focusing on high-performance, power-efficient, scalable solutions. Own aspects of chip design from functional specification through micro-architecture, RTL development, and synthesis, partnering with physical design, verification/DFT, and software/system teams. Debug silicon-level functional, timing, and power issues during bring-up while integrating third-party IP and delivering complex, successful silicon outcomes.