1 day ago

Principal DFT Engineer (Silicon Engineering)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 15 hours agoStatus: Live

Job Summary

Develop next-generation ASICs for Starlink’s space and ground infrastructures by leading and optimizing DFT architecture, scan insertion, and ATPG methodologies. Own pattern generation for stuck-at/transition/path delay fault models and support post-silicon validation. Evaluate design readiness via scan DRC tools, integrate and verify DFT fabrics and IP, and run/debug non-timing and SDF-annotated gate-level simulations. Automate test workflows and analyze results using scripting languages.

Location: Austin, Irvine

Employment Type: Full time

Job Function: Communications, PR & Community

Seniority: Sr. Manager level

Key Responsibilities

•Lead implementation and optimization of DFT architectures, including scan insertion, compression/decompression logic, and BIST, using Siemens Tessent for RTL and gate netlist DFT implementation.
•Own ATPG tools and methodologies, generating patterns for stuck-at, transition, and path delay fault models, with a focus on compression, diagnosis, and hierarchical test flows; provide post-silicon testing and validation support.
•Evaluate design readiness for scan insertion through RTL and physical design scan DRC rule checking.
•Integrate and verify DFT fabrics and IP within subsystems.
•Run and debug non-timing and SDF-annotated gate-level simulations; develop test scripts and automate processes while analyzing data.

Key Requirements

•Bachelor’s degree in electrical engineering, computer engineering, or computer science.
•10+ years of experience working with ASICs.
•10+ years of experience in scan insertion and DFT setup, integration, and validation.

Experience:10+ yearsASICsDFTScan insertionSoC

Education:Bachelor's

Skills:LeadershipProblem-solvingProactiveIntellectual curiosity

Languages:English

Tech Stack:ASICsDFTScan insertionATP GSiemens TessentRTLGate netlistMemory BISTLogic BISTScan DRCDRCSDFNon-timing simulationsPerlPythonTclC++UPFFormal verificationVerilog

Eligibility

Nationality:US National

Company Brief

SpaceX

Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn

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SpaceX

1 day ago

Principal DFT Engineer (Silicon Engineering)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 15 hours agoStatus: Live

Job Summary

Location: Austin, Irvine

Employment Type: Full time

Job Function: Communications, PR & Community

Seniority: Sr. Manager level

Key Responsibilities

•Lead implementation and optimization of DFT architectures, including scan insertion, compression/decompression logic, and BIST, using Siemens Tessent for RTL and gate netlist DFT implementation.
•Own ATPG tools and methodologies, generating patterns for stuck-at, transition, and path delay fault models, with a focus on compression, diagnosis, and hierarchical test flows; provide post-silicon testing and validation support.
•Evaluate design readiness for scan insertion through RTL and physical design scan DRC rule checking.
•Integrate and verify DFT fabrics and IP within subsystems.
•Run and debug non-timing and SDF-annotated gate-level simulations; develop test scripts and automate processes while analyzing data.

Key Requirements

•Bachelor’s degree in electrical engineering, computer engineering, or computer science.
•10+ years of experience working with ASICs.
•10+ years of experience in scan insertion and DFT setup, integration, and validation.

Experience:10+ yearsASICsDFTScan insertionSoC

Education:Bachelor's

Skills:LeadershipProblem-solvingProactiveIntellectual curiosity

Languages:English

Tech Stack:ASICsDFTScan insertionATP GSiemens TessentRTLGate netlistMemory BISTLogic BISTScan DRCDRCSDFNon-timing simulationsPerlPythonTclC++UPFFormal verificationVerilog

Eligibility

Nationality:US National

Company Brief

SpaceX

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn