Senior IP Design Verification Engineer - XBAR IP

NVIDIA
Bengaluru
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 4+ yearsEducation: bachelorsSkills: ["Communication","Teamwork","Debugging","Analytical skills","Scripting"]

Verify the ASIC design, architecture, and micro-architecture of next-generation memory subsystem units for GPUs and SoCs. Define verification scope, build verification infrastructure, and create test plans and verification closure using coverage-driven methodologies. Develop reusable bus functional models, monitors, checkers, and scoreboards, leveraging SV/UVM and assertion-based verification. Collaborate with architects, designers, and pre/post-silicon teams to ensure design correctness.

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FursaFursa
NVIDIA
NVIDIA
17 hours ago

Senior IP Design Verification Engineer - XBAR IP

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Source: Company careers pageValidated by: Fursa AI
Last checked: 17 hours agoStatus: Live

Job Summary

Verify the ASIC design, architecture, and micro-architecture of next-generation memory subsystem units for GPUs and SoCs. Define verification scope, build verification infrastructure, and create test plans and verification closure using coverage-driven methodologies. Develop reusable bus functional models, monitors, checkers, and scoreboards, leveraging SV/UVM and assertion-based verification. Collaborate with architects, designers, and pre/post-silicon teams to ensure design correctness.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Verify the ASIC design, architecture, and micro-architecture of memory sub-systems/units using advanced verification methodologies.
  • •Understand design and implementation, define verification scope, develop verification infrastructure, and verify correctness.
  • •Create test plans, tests, and verification infrastructure for complex IPs/sub-systems.
  • •Build reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven verification.
  • •Execute functional coverage-driven verification closure and work with architects, designers, and pre/post-silicon verification teams.

Key Requirements

  • •B.Tech./M.Tech. or equivalent experience.
  • •4+ years of relevant experience in design verification of complex IPs/units and sub-systems.
  • •Experience with random stimulus, functional coverage, and assertion-based verification methodologies.
  • •Expertise in Verilog and knowledge of SystemVerilog or similar HVL/UVM/VMM.
  • •Ability to debug and analyze issues, with sound scripting knowledge, plus strong communication and teamwork.
Experience:4+ years
Education:Bachelor's
Skills:CommunicationTeamworkDebuggingAnalytical skillsScripting
Tech Stack:VerilogSystemVerilogSVUVMVMMASICHVLFunctional coverageAssertion-based verificationRandom stimulusBus functional modelsScoreboardsMonitorsCheckers

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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