3 months ago

Design Enablement Engineer II

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Design Enablement Engineer II at Cadence develops post-silicon infrastructure and validation automation to accelerate test cycles. You’ll integrate silicon, HW, firmware, and system software across InfiniBand/PCIe, PXE booting, and various interfaces, execute post-silicon tests, analyze issues, and drive automated validation environments in a globally distributed team.

Location: Shanghai

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Leverage silicon verification platform and environment to create necessary post-silicon infrastructure, methodology and automation to allow tests executed in a timely and efficient manner.
•Integrate silicon, HW, firmware, and system software into a complete system which includes various InfiniBand and PCIe protocols, PXE booting, virtual machines, secure networks, Ethernet and Ethernet-over-InfiniBand, sockets and RPC calls, FPGA, microcontroller interfaces, JTAG, I2C, SPI, SERDES, memory and many other interfaces.
•Execute post-silicon tests to expose design issues, validate product against the specifications including performance, and qualify the design for production release.
•Review, replicate, and respond to customer issues. Perform initial analysis of error logs from customer design simulation runs. Debug and isolate system-level issues down to ASIC/FPGAs, host servers, subsystems, firmware modules, runtime diagnostics.
•Develop silicon and system stress tests. Leverage tests developed by other engineers. Package tests for production and field use.

Key Requirements

•Bachelor’s degree in Electrical Engineering or Computer Engineering; Master’s degree preferred.

Experience:SemiconductorHardwareEmbedded

Education:Bachelor's in Electrical Engineering/Computer Engineering

Skills:CommunicationTeamworkSelf-motivatedProblem-solving

Tech Stack:PythonInfiniBandPCIePXEVMJTAGI2CSPISERDESFPGARPCEthernet

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

3 months ago

Design Enablement Engineer II

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Location: Shanghai

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Leverage silicon verification platform and environment to create necessary post-silicon infrastructure, methodology and automation to allow tests executed in a timely and efficient manner.
•Integrate silicon, HW, firmware, and system software into a complete system which includes various InfiniBand and PCIe protocols, PXE booting, virtual machines, secure networks, Ethernet and Ethernet-over-InfiniBand, sockets and RPC calls, FPGA, microcontroller interfaces, JTAG, I2C, SPI, SERDES, memory and many other interfaces.
•Execute post-silicon tests to expose design issues, validate product against the specifications including performance, and qualify the design for production release.
•Review, replicate, and respond to customer issues. Perform initial analysis of error logs from customer design simulation runs. Debug and isolate system-level issues down to ASIC/FPGAs, host servers, subsystems, firmware modules, runtime diagnostics.
•Develop silicon and system stress tests. Leverage tests developed by other engineers. Package tests for production and field use.

Key Requirements

•Bachelor’s degree in Electrical Engineering or Computer Engineering; Master’s degree preferred.

Experience:SemiconductorHardwareEmbedded

Education:Bachelor's in Electrical Engineering/Computer Engineering

Skills:CommunicationTeamworkSelf-motivatedProblem-solving

Tech Stack:PythonInfiniBandPCIePXEVMJTAGI2CSPISERDESFPGARPCEthernet

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor