Design Verification Engineer - SoC

Etched
San Jose
Workplace: OnsiteFull timeUSD 150,000 - 275,000 annuallyFunction: Design (Product/UX/UI/Visual)Skills: ["Collaboration","Debugging","Problem-solving"]

Design Verification Engineer to join the Systems/Performance Verification team for Etched’s SoC hardware. You’ll verify custom IPs (systolic arrays, DMA engines, NoCs) to ensure robustness, performance, and silicon-readiness, collaborating with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.

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Etched
Etched
5 months ago

Design Verification Engineer - SoC

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Source: Company careers pageValidated by: Fursa AI
Last checked: 6 hours agoStatus: Live
Reposted: similar role first listed 1 year ago

Job Summary

Design Verification Engineer to join the Systems/Performance Verification team for Etched’s SoC hardware. You’ll verify custom IPs (systolic arrays, DMA engines, NoCs) to ensure robustness, performance, and silicon-readiness, collaborating with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Verify the performance features of the design and correlate with performance models (pre- and post-silicon).
  • •Collaborate with software and application teams to identify performance bottlenecks and optimize software.
  • •Develop test plans and infrastructure/tools for performance tuning, correlation, and verification.
  • •Improve and maintain architectural performance models.
  • •Develop tests and checkers in SystemVerilog or Python to debug and correlate RTL and performance models.

Pay and Benefits

Salary: USD 150,000 - 275,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVisionHousing SubsidyRelocationWellness StipendMeal Allowance

Key Requirements

  • •Strong understanding of digital design, RTL, and ASIC design flows.
  • •Hands-on experience with performance verification, simulation, and modeling.
  • •Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.
  • •Skilled in writing Python scripts for automation, data analysis, and performance modeling.
  • •Experience building and maintaining performance models for chip subsystems.
Skills:CollaborationDebuggingProblem-solving
Tech Stack:SystemVerilogPythonRTLASICEmulationPerformance modelingTestbenchesVerification

Company Brief

Etched
Designs transformer‑specialized AI inference ASICs (product: Sohu) to accelerate large‑language‑model workloads, working with TSMC for fabrication and targeting energy‑efficient inference performance.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Early Stage Startup
Valuation: Unicorn (USD 1B+)
Funding: Series A
Headquarters: San Jose, United States
Founded: 2022
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