SoC Physical Verification Engineer, HBM
United States
Workplace: OnsiteFull timeUSD 97,000 - 205,000 annuallyFunction: QA, Test & Release EngineeringEducation: mastersSkills: ["Cross-functional communication","Debugging","Automation mindset","Verification closure ownership"]Own end-to-end physical verification sign-off for full-chip and hierarchical SoCs in Micron’s Heterogeneous Integration Group, driving DRC/LVS/ERC/PERC, reliability checks, and DFM/antenna compliance. Execute and debug foundry-qualified rule decks, manage waivers, and drive clean closure from RTL-to-GDS flow impacts through tape-out readiness. Automate verification flows with Python/Tcl/Perl, correlate results with post-silicon measurements, and advance AI/ML-based verification and PPA optimization tools.
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