R&D Engineer IC Design 5

Broadcom
San Jose
Workplace: OnsiteFull timeUSD 143,800 - 230,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["Technical communication","Cross-functional collaboration","Executive communications comfort","Technical documentation","Problem-solving"]

Work on ASIC system-level verification as a key team member, building complex verification environments, developing comprehensive test plans, and driving hand-on verification across the full ASIC lifecycle. From architecting testbenches (networking background preferred) to achieving verification closure, you’ll collaborate with system architects and design engineers while verifying high-performance network switch ASICs/FPGAs. The role requires strong Verilog, modern verification flows (UVM/SystemVerilog), and proven tape-out experience.

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FursaFursa
Broadcom
Broadcom
3 days ago

R&D Engineer IC Design 5

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Source: Company careers pageValidated by: Fursa AI
Last checked: 3 hours agoStatus: Live

Job Summary

Work on ASIC system-level verification as a key team member, building complex verification environments, developing comprehensive test plans, and driving hand-on verification across the full ASIC lifecycle. From architecting testbenches (networking background preferred) to achieving verification closure, you’ll collaborate with system architects and design engineers while verifying high-performance network switch ASICs/FPGAs. The role requires strong Verilog, modern verification flows (UVM/SystemVerilog), and proven tape-out experience.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Develop complex ASIC verification environments and comprehensive test plans.
  • •Build and implement hands-on verification across every aspect of ASIC verification.
  • •Architect testbenches, with networking background preferred, and drive verification toward closure.
  • •Verify high-performance network switch ASICs/FPGAs in collaboration with system architects, design engineers, and verification teams.
  • •Complete multiple successful ASIC design and verification cycles through tape-out (concept to production).

Pay and Benefits

Salary: USD 143,800 - 230,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kEquityPaid LeavePaid HolidaysEmployee Assistance

Key Requirements

  • •8+ years of ASIC design/verification experience, including complete understanding of Verilog design and hands-on experience with C/C++.
  • •Experience with modern ASIC verification flows such as UVM/SystemVerilog and strong object-oriented programming fundamentals.
  • •Complete mastery of Verilog for simulation and familiarity with ASIC design flows for deep sub-micron technologies.
  • •Hands-on networking protocol knowledge (e.g., Ethernet, PCIe, routing/switching) is a major plus.
  • •Completed multiple ASIC tape-outs, including at least one project taken from initial concept through full production.
Experience:8+ yearsASIC designASIC verificationFPGAsNetworking
Education:Bachelor's in Bachelor's in Engineering
Skills:Technical communicationCross-functional collaborationExecutive communications comfortTechnical documentationProblem-solving
Languages:English
Tech Stack:ASICVerilogCC++UVMSystemVerilogOOPSimulationDeep sub-micronEthernetPCIeRoutingSwitchingFPGA

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn