Analog & RF IC Senior Layout Engineer

Broadcom
Irvine, San Diego
Workplace: OnsiteFull timeUSD 109,700 - 175,500 annuallyFunction: Solutions Engineering & Sales EngineeringExperience: 8+ yearsEducation: bachelorsSkills: ["Collaboration","Problem-solving","Attention to detail"]

Join a team building the next generation of high-tech hardware. As an Analog/RF layout engineer, you’ll translate circuit schematics into DRC/LVS-clean custom IC layouts for critical IP blocks. Partner with senior designers on floorplanning, power/ground architecture, and device matching, using Cadence Virtuoso and Mentor Calibre to deliver full-cycle ownership from floorplan through tape-out and sign-off on advanced FinFET nodes.

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Broadcom
Broadcom
1 month ago

Analog & RF IC Senior Layout Engineer

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Last checked: 6 days agoStatus: Live

Job Summary

Join a team building the next generation of high-tech hardware. As an Analog/RF layout engineer, you’ll translate circuit schematics into DRC/LVS-clean custom IC layouts for critical IP blocks. Partner with senior designers on floorplanning, power/ground architecture, and device matching, using Cadence Virtuoso and Mentor Calibre to deliver full-cycle ownership from floorplan through tape-out and sign-off on advanced FinFET nodes.
Location: Irvine, San Diego
Workplace: Onsite
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

  • •Translate circuit schematics into DRC/LVS-clean layouts for critical IP blocks.
  • •Collaborate on floorplanning, power/ground architecture, and precision device matching.
  • •Leverage industry EDA tools to implement layouts on advanced process nodes (FinFET and beyond).
  • •Participate in schedule assessments and top-level integration for silicon design projects.
  • •Own custom top-level and IP blocks from initial floorplanning through final tape-out and sign-off.

Pay and Benefits

Salary: USD 109,700 - 175,500 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kPaid LeavePaid HolidaysEsppEap

Key Requirements

  • •Translate circuit schematics into DRC/LVS-clean layouts for critical IP blocks.
  • •Work closely with senior designers on floorplanning, power/ground architecture, and precision device matching.
  • •Use EDA tools to design and verify high-speed custom analog/digital circuits (e.g., TX, RX, SerDes, PLLs).
  • •Demonstrate deep familiarity with Cadence Virtuoso, including Virtuoso VXL layout, and Mentor Calibre verification.
  • •Have a BS in Electrical Engineering with 8+ years of related experience, or an MS with 6+ years, plus proven layout experience in advanced FinFET nodes.
Experience:8+ yearsHigh-speed analogCustom siliconFinFET
Education:Bachelor's in Electrical Engineering
Skills:CollaborationProblem-solvingAttention to detail
Tech Stack:DRCLVSCadence VirtuosoVirtuoso VXLMentor CalibreFinFETEDASerDesPLL

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn