Physical Design Engineer

Broadcom
India
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 6+ yearsEducation: mastersSkills: ["Analytical skills","Collaboration","Automation mindset","Leading by example"]

Lead Broadcom’s right-first-time physical design methodology for SoC in 5nm and lower technologies. Drive block/level layout and physical design tasks including floorplanning, partitioning, placement, clock tree synthesis, routing, extraction, and physical verification toward STA closure. Implement timing and functional ECOs, improve quality and TAT through automation, and adapt or build automation flows. Work with backend digital design flows and EDA toolchains across P&R, PV, STA, and ECO stages.

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FursaFursa
Broadcom
Broadcom
2 months ago

Physical Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 26 days agoStatus: Live
Reposted: similar role first listed 2 months ago

Job Summary

Lead Broadcom’s right-first-time physical design methodology for SoC in 5nm and lower technologies. Drive block/level layout and physical design tasks including floorplanning, partitioning, placement, clock tree synthesis, routing, extraction, and physical verification toward STA closure. Implement timing and functional ECOs, improve quality and TAT through automation, and adapt or build automation flows. Work with backend digital design flows and EDA toolchains across P&R, PV, STA, and ECO stages.
Location: India
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Apply and lead Broadcom’s physical design methodology and milestone flow to achieve right-first-time silicon.
  • •Perform layout activities for block and level including floorplanning, partitioning, placement, clock tree synthesis, routing, and physical verification.
  • •Implement timing and functional ECO and work toward STA closure.
  • •Manage P&R, extraction, and physical verification activities as part of backend digital design flow.
  • •Build or adapt automation flows for re-use and improve TAT through better quality.

Key Requirements

  • •6+ years with MSEE or MSCS (or 8+ years with BSEE/BSCS) in backend digital design flow.
  • •Deep understanding of P&R flows and ability to catch up on internal flows quickly.
  • •Proficiency with timing constraints and physical constraints.
  • •Experience handling EDA tools across floorplanning, partitioning, placement, CTS, and routing stages for SoC top-level.
  • •Proficiency with tools and scripting: Genus/Innovus/Quantus/Tempus, DC/Star-RCXT/PT, PrimeRail/Voltus, Redhawk, plus Tcl and Perl.
Experience:6+ yearsSoCBackend digital designEDAPhysical design5nm
Education:Master's
Skills:Analytical skillsCollaborationAutomation mindsetLeading by example
Tech Stack:CadenceSynopsysMentorGenusInnovusQuantusTempusDCStar-RCXTPTPrimeRailVoltusRedhawkTclPerlSTA closureECOP&RPhysical verificationFloorplanning

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn