SOC Physical Design and STA Methodology Engineer

Samsung
Bengaluru
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5-8 yearsEducation: bachelorsSkills: ["Problem-solving","Communication","Collaboration"]

SoC physical design specialist focused on flow and methodology development, delivering Python-driven EDA automation and production-grade PnR/STA flows for partition and chip-top designs. Responsibilities include timing constraints, low-power design, ECOs, and enabling design teams across multiple nodes with automation utilities and advanced signoff techniques.

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FursaFursa
Samsung
Samsung
5 months ago

SOC Physical Design and STA Methodology Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 9 days agoStatus: Live

Job Summary

SoC physical design specialist focused on flow and methodology development, delivering Python-driven EDA automation and production-grade PnR/STA flows for partition and chip-top designs. Responsibilities include timing constraints, low-power design, ECOs, and enabling design teams across multiple nodes with automation utilities and advanced signoff techniques.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Develop and maintain production-grade PnR and STA signoff flows for partition and full-chip designs, including timing closure and ECO implementation
  • •Create and maintain PnR/STA automation utilities to improve PPA and runtime for design teams
  • •Collaborate with partition and full-chip design teams to address convergence issues, timing closure, and DRC fixing
  • •Develop and refine constraints (SDC) and timing debug processes, including derates and PVT corner handling
  • •Document flows, create regression tests, and train design teams on methodology best practices

Key Requirements

  • •Experience in SoC Physical Design with proven track record in flow and methodology development
  • •Expert in scripting for EDA automation: Python (preferred), Tcl, Perl, UNIX shell
  • •Deep hands-on experience with PnR and Signoff tools: Synopsys (Fusion Compiler, PrimeTime, ICV, Formality) and/or Cadence (Innovus, Genus, Voltus, Tempus)
  • •Developed production-grade PnR flows for partition and Chip Top level designs including power planning, placement, optimization, and routing
  • •Strong STA fundamentals: Constraints (SDC) development, timing debug, OCV/POCV derates, PVT corners, and ECO flows
  • •Experience in low power and multi-voltage designs: UPF, power gating, voltage islands
  • •Built automation utilities for PnR execution, signoff analysis, and ECO implementation
  • •Solid understanding of libraries, cell architectures, and technology files for optimization and ECO stages
  • •Experience with AI-driven optimization tools (DSO.ai, Cerebrus)
  • •Advanced ECO tool expertise (Tweaker, PrimeClosure)
  • •Formal verification (LEC) methodology experience
  • •Hierarchical STA and chip-top integration experience
  • •DTCO and advanced node (3nm, 2nm) exposure
  • •Debug, enhance, and release PnR and STA signoff flows for multiple projects and process nodes
  • •Develop utilities and automation to improve PPA, runtime, and ease of use for design teams
  • •Support partition and full-chip design teams on complex convergence issues, timing closure, and DRC fixing
  • •Explore and deploy new EDA capabilities and PPA optimization recipes to production flows
  • •Document flows, create regression tests, and train design teams on methodology best practices
Experience:5-8 yearsSemiconductorEDAHardware design
Education:Bachelor's
Skills:Problem-solvingCommunicationCollaboration
Languages:English
Tech Stack:PythonTclPerlUNIX shellSynopsys Fusion CompilerPrimeTimeICVFormalityInnovusGenusVoltusTempusDSO.aiCerebrusTweakerPrimeClosureLECDTCO

Company Brief

Samsung
Global conglomerate known for consumer electronics, home appliances, semiconductors, displays, and mobile devices. Designs and manufactures a wide range of products and solutions for consumers, enterprises, and industrial customers worldwide.
Industry: Conglomerates & Holding Companies
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Seoul, South Korea
Founded: 1938
Glassdoor
Glassdoor: 3.7
WebsiteLinkedIn