Physical Design Engineer

Broadcom
Pune
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 10+ yearsEducation: mastersSkills: ["Analytical skills","Cross-functional collaboration","Leading by example","Execution ownership"]

Lead Broadcom’s physical design methodology to achieve right-first-time silicon. Own block-level and top-level layout activities including floorplanning, partitioning, placement, CTS, routing, and physical verification, driving STA closure. Implement timing and functional ECOs, execute P&R/extraction/PV, and build or adapt automation flows. Maintain expertise across Cadence/Synopsys/Mentor EDA tools and improve turnaround time while raising quality across multi-site teams.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Broadcom
Broadcom
3 weeks ago

Physical Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Lead Broadcom’s physical design methodology to achieve right-first-time silicon. Own block-level and top-level layout activities including floorplanning, partitioning, placement, CTS, routing, and physical verification, driving STA closure. Implement timing and functional ECOs, execute P&R/extraction/PV, and build or adapt automation flows. Maintain expertise across Cadence/Synopsys/Mentor EDA tools and improve turnaround time while raising quality across multi-site teams.
Location: Pune
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Apply and lead physical design methodology and milestone flow to achieve right-first-time silicon.
  • •Execute block-level/top-level P&R activities: floorplanning, partitioning, placement, clock tree synthesis, routing, and physical verification.
  • •Implement timing and functional ECOs and drive STA closure.
  • •Develop and adapt automation flows; build new automation flows as needed.
  • •Maintain proficiency in EDA toolsets across P&R, PV, STA, and ECO and improve turnaround time with better quality.

Key Requirements

  • •MSEE/MSCS with 10+ years of experience, or BSEE/BSCS with 12+ years of experience.
  • •Extensive knowledge of block-level and top-level physical design integration for SoCs in 5nm and lower technologies.
  • •Strong proficiency in timing and functional ECOs, including physical verification and working toward STA closure.
  • •Experience across backend P&R stages for SoC top, including floorplan, partition, placement, CTS, and route.
  • •Proficiency with EDA tools and automation skills, including Tcl and Perl.
Experience:10+ yearsSemiconductorsSoC
Education:Master's
Skills:Analytical skillsCross-functional collaborationLeading by exampleExecution ownership
Tech Stack:CadenceSynopsysMentor EDAGenusInnovusQuantusTempusDCStar-RCXTPTPrimeRailVoltusRedhawkTclPerl

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn