ASIC Technical Leader - Product Quality & Productization (Hybrid)

Cisco
San Jose
Workplace: HybridFull timeUSD 214,100 - 309,800 annuallyFunction: Quality & Regulatory (Non-Software)Experience: 20+ yearsSkills: ["Leadership","Cross-functional collaboration","Data-driven decision-making","Root cause analysis","Executive communication"]

Provide high-level technical leadership for Silicon One by bridging DFT architecture, silicon quality, and high-volume manufacturing. Own the end-to-end product lifecycle from RTL design and NPI through mass production, driving reliability, yield, and field performance. Lead DFT strategy (JTAG/SCAN/BIST), guide early DFM/DFT integration, oversee RCA and qualification/ESS activities, and optimize yield using advanced diagnostics and data-driven process improvements.

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FursaFursa
Cisco
Cisco
3 days ago

ASIC Technical Leader - Product Quality & Productization (Hybrid)

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Last checked: 6 hours agoStatus: Live

Job Summary

Provide high-level technical leadership for Silicon One by bridging DFT architecture, silicon quality, and high-volume manufacturing. Own the end-to-end product lifecycle from RTL design and NPI through mass production, driving reliability, yield, and field performance. Lead DFT strategy (JTAG/SCAN/BIST), guide early DFM/DFT integration, oversee RCA and qualification/ESS activities, and optimize yield using advanced diagnostics and data-driven process improvements.
Location: San Jose
Workplace: Hybrid
Employment Type: Full time
Job Function: Quality & Regulatory (Non-Software)

Key Responsibilities

  • •Lead the development and execution of robust DFT architectures (JTAG, SCAN, BIST) and integrate test modes at the top-level RTL.
  • •Guide multidisciplinary teams in early integration of DFM and DFT principles to ensure optimal test coverage.
  • •Orchestrate SoC transitions from development through NPI to successful mass production, managing program risks and providing executive-level status reporting.
  • •Lead high-level RCA initiatives using advanced diagnostics to drive corrective and preventative actions.
  • •Supervise product qualification activities (including ESS, electrical characterization, and accelerated life testing) and drive yield improvement via yield analysis, power binning, and fuse array repairs.

Pay and Benefits

Salary: USD 214,100 - 309,800 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kPaid ParentalDisability CoverageLife InsuranceEquityPaid Holidays

Key Requirements

  • •20+ years in silicon DFT, test, quality, and program management, including 5+ years in high-reliability hardware environments.
  • •Deep knowledge of the full ASIC development lifecycle within the Silicon One pipeline and advanced FinFET processes (6nm/7nm).
  • •Mastery of Synopsys suite (Design Compiler, Tetramax, Spyglass, VCS) and ATE (93K testers).
  • •Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • •Experience leading RCA initiatives and driving corrective and preventative actions for reliability and yield improvement.
Experience:20+ yearsSilicon DFTASICHigh-reliability hardwareSemiconductorsFinFETHigh-volume manufacturing
Education:
Skills:LeadershipCross-functional collaborationData-driven decision-makingRoot cause analysisExecutive communication
Tech Stack:JTAGSCANBISTRTLDFMDFTSynopsys Design CompilerTetramaxSpyglassVCSATE 93K testersISO 9001Environmental Stress Screening (ESS)JMPPythonSQL

Company Brief

Cisco
Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1984
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