Experienced IP Logic Design Engineer

Design and validate scalable IP for Intel hardware security initiatives within the Foundational Security team. You’ll develop RTL logic, simulation, and register-transfer-level coding to build cell libraries, functional units, and IP blocks, then refine architecture and microarchitecture features. Partner with verification, RTL, and micro-architecture teams to create test plans and verification environments, resolve failing RTL tests, and support high-quality IP integration and verification for SoC delivery.