SerDes Verification Engineer

AMD
Singapore
Workplace: HybridFull timeSGD 50,400 - 72,000 annuallyFunction: Solutions Engineering & Sales EngineeringEducation: bachelorsSkills: ["Analytical","Problem-solving","Communication"]

Build and validate verification environments for high-speed SerDes interfaces used in advanced SoCs and chiplet designs. Develop UVM/SystemVerilog (and optionally VHDL) testbenches, run simulations, and debug timing and protocol issues. Evaluate signal integrity, jitter, BER, and eye diagrams while driving protocol compliance across interfaces such as UCIe, PCIe, DDR, Ethernet, and more. Automate regressions, collaborate with design/hardware teams, and document results.

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FursaFursa
AMD
AMD
1 day ago

SerDes Verification Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 11 hours agoStatus: Live

Job Summary

Build and validate verification environments for high-speed SerDes interfaces used in advanced SoCs and chiplet designs. Develop UVM/SystemVerilog (and optionally VHDL) testbenches, run simulations, and debug timing and protocol issues. Evaluate signal integrity, jitter, BER, and eye diagrams while driving protocol compliance across interfaces such as UCIe, PCIe, DDR, Ethernet, and more. Automate regressions, collaborate with design/hardware teams, and document results.
Location: Singapore
Workplace: Hybrid
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

  • •Develop and run verification plans and testbenches for SerDes IPs and subsystems, including formal verification and assertions.
  • •Design and implement verification environments using industry-standard methodologies such as UVM and SystemVerilog (and potentially VHDL).
  • •Run simulations, analyze results, and debug timing, protocol errors, and other SerDes design anomalies.
  • •Evaluate and validate performance metrics such as jitter, bit error rate (BER), signal integrity, and eye diagrams.
  • •Collaborate with design and hardware teams, build automated regression tests, and document verification findings and fixes.

Pay and Benefits

Salary: SGD 50,400 - 72,000 annually

Key Requirements

  • •Develop and execute verification plans and testbenches for SerDes IPs and subsystems, including formal verification with properties and assertions.
  • •Strong hands-on verification experience using UVM and SystemVerilog (and/or VHDL) with simulation-based workflows.
  • •Knowledge of high-speed serial protocols such as UCIe, PCIe, Ethernet, USB, DDR, DisplayPort, or custom protocols.
  • •Experience analyzing signal integrity issues including jitter, BER, and eye diagrams, plus understanding of SerDes link training and equalization.
  • •Bachelors or Masters degree in computer engineering or electrical engineering.
Experience:SemiconductorHigh-speed communicationsChipletSoCHardware verification
Education:Bachelor's in computer engineering / electrical engineering
Skills:AnalyticalProblem-solvingCommunication
Languages:English
Tech Stack:UVMSystemVerilogVHDLVerilogPythonPerlUCIePCIeEthernetUSBDDRDisplayPortBEREye diagrams

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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