Staff Memory Circuit Design Engineer

Broadcom
United States
Workplace: OnsiteFull timeUSD 108,000 - 172,800 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsSkills: ["Communication","Interpersonal skills","Leadership","Self-driven","Multi-tasking"]

Design and develop next-generation memory compilers and custom macros for advanced process technology. Analyze memory architectures, implement memory/circuit blocks at gate and transistor levels, and run transistor-level simulations with layout extraction and post-layout verification. Build physical macros via floorplanning and leafcell integration, automate characterization/simulation/verification flows, specify behavioral/physical models, and correlate silicon test results to simulation data while debugging issues.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Broadcom
Broadcom
5 months ago

Staff Memory Circuit Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 15 days agoStatus: Live

Job Summary

Design and develop next-generation memory compilers and custom macros for advanced process technology. Analyze memory architectures, implement memory/circuit blocks at gate and transistor levels, and run transistor-level simulations with layout extraction and post-layout verification. Build physical macros via floorplanning and leafcell integration, automate characterization/simulation/verification flows, specify behavioral/physical models, and correlate silicon test results to simulation data while debugging issues.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Analyze different memory architectures and communicate key tradeoffs.
  • •Design and build memory/circuit blocks at the gate or transistor level.
  • •Simulate and analyze designs using transistor-level simulators, then verify post-layout behavior via extracted layout.
  • •Integrate floorplan physical implementation and leafcell layout to build physical macros, including characterization flow integration for timing/power.
  • •Specify and verify behavioral and physical memory models, define silicon test plans, correlate silicon to simulation, and help debug silicon issues.

Pay and Benefits

Salary: USD 108,000 - 172,800 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kEquityPaid Leave

Key Requirements

  • •BS in Electrical Engineering with 8+ years of related experience, or MS with 6+ years, or PhD with 3+ years.
  • •Knowledge of memory compiler development or custom digital circuits (e.g., SRAMs, register-files, multi-ports, ROM).
  • •Strong understanding of transistor-level circuit behavior and device physics.
  • •Understanding of memory behavioral and physical models, plus DFT schemes and chip-level integration.
  • •Ability to simulate/analyze using transistor-level simulators and develop automation scripts (Python preferred), with good communication and leadership.
Experience:8+ years
Education:
Skills:CommunicationInterpersonal skillsLeadershipSelf-drivenMulti-tasking
Tech Stack:Python

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn