Sr. RTL Design Engineer

AMD
Markham, Vancouver, Ottawa
Workplace: HybridFull timeCAD 135,800 - 232,800 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Communication","Teamwork","Continuous learning","Detail-oriented","Technical problem-solving"]

Design and implement IP RTL for AMD’s PCI Express (PCIe) and other next-generation products, partnering with IP and system architects to micro-architect advanced features. Apply low-power techniques, ensure timing and quality via lint/CDC closure, and support verification and ASIC debug across project stages. Leverage AI-assisted RTL design methodologies from concept through tapeout and post-silicon validation to improve productivity, functionality, and time-to-market.

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FursaFursa
AMD
AMD
1 month ago

Sr. RTL Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 8 hours agoStatus: Live

Job Summary

Design and implement IP RTL for AMD’s PCI Express (PCIe) and other next-generation products, partnering with IP and system architects to micro-architect advanced features. Apply low-power techniques, ensure timing and quality via lint/CDC closure, and support verification and ASIC debug across project stages. Leverage AI-assisted RTL design methodologies from concept through tapeout and post-silicon validation to improve productivity, functionality, and time-to-market.
Location: Markham, Vancouver, Ottawa
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Perform IP RTL design for AMDs PCI Express (PCIe) IP used in next-generation server, client, GPU, and semi-custom products.
  • •Partner with IP and system architects to micro-architect cutting-edge features.
  • •Apply low power design techniques to existing logic while maintaining overall system performance.
  • •Ensure high-quality RTL through timing, LINT and CDC closure.
  • •Support ASIC verification and debug across multiple project stages.

Pay and Benefits

Salary: CAD 135,800 - 232,800 annually

Key Requirements

  • •Strong working experience in RTL coding using Verilog HDL.
  • •Integrate AI-assisted design methodologies into semiconductor development flows from concept through tapeout and post-silicon validation.
  • •Experience designing with multiple clock domains.
  • •Experience using lint and CDC tools.
  • •Develop specifications and earn a Bachelors or Masters degree in Computer Engineering/Electrical Engineering.
Experience:SemiconductorASICProduction siliconAI-assisted design
Education:Bachelor's in Computer Engineering / Electrical Engineering
Skills:CommunicationTeamworkContinuous learningDetail-orientedTechnical problem-solving
Tech Stack:RTL designVerilog HDLAI-assisted designAI-generated RTLPCI Express (PCIe)Low power designTiming closureLintCDCTapeoutPost-silicon validationMultiple clock domainsASICPCIeUSBSATAEthernet

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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Glassdoor: 3.9
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