SoC Physical Design Engineer, Senior Member of Technical Staff (SMTS)

Micron Technology
United States
Workplace: OnsiteFull timeUSD 177,000 - 334,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 15+ yearsEducation: bachelorsSkills: ["Collaboration","Problem-solving","Attention to detail","Process improvement"]

Drive SoC physical implementation for advanced HBM SoC logic/base die designs in Micron’s Heterogeneous Integration Group. Own the physical flow from netlist to GDSII, including floorplanning, placement, CTS, routing, timing closure, power/clock/reset integration, and physical optimization to hit PPA targets. Perform/coordinate signoff (DRC/LVS, IR drop/EM, timing), support tapeout, and improve productivity via scripting and automation while partnering with RTL, verification, DFT, packaging, test, and manufacturing teams.

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Micron Technology
Micron Technology
2 months ago

SoC Physical Design Engineer, Senior Member of Technical Staff (SMTS)

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Last checked: 19 hours agoStatus: Live

Job Summary

Drive SoC physical implementation for advanced HBM SoC logic/base die designs in Micron’s Heterogeneous Integration Group. Own the physical flow from netlist to GDSII, including floorplanning, placement, CTS, routing, timing closure, power/clock/reset integration, and physical optimization to hit PPA targets. Perform/coordinate signoff (DRC/LVS, IR drop/EM, timing), support tapeout, and improve productivity via scripting and automation while partnering with RTL, verification, DFT, packaging, test, and manufacturing teams.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Own physical implementation for SoC blocks and/or top-level, including floorplanning, placement, CTS, routing, and physical optimization to meet PPA targets.
  • •Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios in partnership with RTL, architecture, and STA/signoff.
  • •Ensure clean clocking/reset strategy, power architecture, and SoC integration requirements are implemented with design and integration teams.
  • •Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY-adjacent logic) with robust physical integration and timing/power integrity.
  • •Perform/coordinate physical signoff (DRC/LVS, IR drop/EM, and timing signoff), support tapeout execution, and contribute to post-silicon debug with PD/STA/power analysis.

Pay and Benefits

Salary: USD 177,000 - 334,000 annually
Perks:Health InsuranceDentalVisionPaid LeaveTime OffPaid Holidays

Key Requirements

  • •Strong experience in SoC physical design implementation from netlist to GDSII on advanced nodes and complex designs.
  • •Proficiency with industry EDA tools such as Cadence Innovus/Tempus, Synopsys ICC2/PrimeTime, and Siemens Calibre.
  • •Experience with power intent and power delivery considerations (e.g., UPF/CPF concepts, power grid planning, power gating implications).
  • •Knowledge of IR/EM analysis, noise, coupling/crosstalk considerations, and mitigation strategies.
  • •Strong scripting/automation skills using Python, TCL, Perl, and/or shell.
Experience:15+ yearsSoC physical designHBMSemiconductorsHBM/DRAM adjacent designsDRAMMemory-subsystem-heavy SoCs
Education:Bachelor's in Electrical Engineering or Computer Engineering
Skills:CollaborationProblem-solvingAttention to detailProcess improvement
Tech Stack:Cadence InnovusCadence TempusSynopsys ICC2Synopsys PrimeTimeSiemens CalibreUPFCPFGDSIIPythonTCLPerlShellDRCLVSIR dropEMUPF/CPFFloor planningCTSTiming closure

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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