Experienced IP Logic Design Engineer
San Jose
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["SystemVerilog","Verilog","RTL","UPF","Testbench","Lint tools"]Design, optimize, and validate IP blocks for SoC integrations, driving power, performance, area, and timing goals. Collaborate with SoC customers and verification teams to ensure high-quality IP delivery and seamless integration in a hybrid work model at Intel’s Silicon and Platform Engineering Group in Costa Rica.
Loading
Loading job details...
Preparing the role view and application actions.

