3 months ago

ASIC Link Modeling Technical Leader

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Lead development of system-level behavioral models and link simulations for Cisco’s silicon photonics platforms, focusing on high-speed SerDes, optical DSP, and die-to-die interfaces to enable 100G/200G/400G per Lambda solutions. Drive transceiver architecture optimization, pre- and post-silicon validation, and cross-functional collaboration to deliver industry-leading optical modules and Co-packaged Optics.

Location: United States

Workplace: Onsite

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

•Develop system-level behavioral models and comprehensive link simulations for Cisco's silicon photonics systems, enabling performance analysis across high-speed SerDes, optical DSP, and die-to-die interfaces for next-generation 100G/200G/400G per Lambda solutions.
•Lead link budget analysis, channel modeling, and statistical simulations to evaluate jitter, noise, crosstalk, and bit error rate (BER) across transmit and receive paths.
•Define and optimize transceiver architectures including TX/RX equalization (FFE, CTLE, DFE), clock and data recovery behavior, and DSP algorithms through behavioral modeling and simulation.
•Debug complex link simulations, identify architectural bottlenecks, and correlate pre-silicon models with post-silicon lab measurements to validate design performance.
•Collaborate across cross-functional teams to develop IBIS-AMI models, create modeling documentation, and support product release from concept through production.

Pay and Benefits

Salary: USD 189,300 - 271,500 annually

Perks:Health InsuranceDentalVision401k

Key Requirements

•Bachelor's degree + 12 years of related experience, or Master's + 8 years of related experience, or PhD + 5 years of ASIC link modeling experience
•Proficiency in Python, C/C++, and MATLAB for behavioral model development and automated analysis
•Proven understanding of high-speed communication theory, transmission line theory, SerDes, Ethernet, D2D PHY protocols, and DSP fundamentals
•Demonstrated experience with EDA and SI simulation tools (e.g., Keysight ADS, Synopsys HSPICE, Cadence) and link modeling methodologies
•Analytical, problem-solving, and debugging skills with excellent communication and teamwork abilities

Experience:Silicon photonicsOptical communicationsData center networks

Education:Bachelor's

Skills:CommunicationTeamworkProblem-solving

Tech Stack:PythonC/C++MATLABKeysight ADSSynopsys HSPICECadenceIBIS-AMILinux

Company Brief

Cisco

Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1984

Glassdoor: 4.0

Website LinkedIn Glassdoor

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Cisco

3 months ago

ASIC Link Modeling Technical Leader

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Location: United States

Workplace: Onsite

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

•Develop system-level behavioral models and comprehensive link simulations for Cisco's silicon photonics systems, enabling performance analysis across high-speed SerDes, optical DSP, and die-to-die interfaces for next-generation 100G/200G/400G per Lambda solutions.
•Lead link budget analysis, channel modeling, and statistical simulations to evaluate jitter, noise, crosstalk, and bit error rate (BER) across transmit and receive paths.
•Define and optimize transceiver architectures including TX/RX equalization (FFE, CTLE, DFE), clock and data recovery behavior, and DSP algorithms through behavioral modeling and simulation.
•Debug complex link simulations, identify architectural bottlenecks, and correlate pre-silicon models with post-silicon lab measurements to validate design performance.
•Collaborate across cross-functional teams to develop IBIS-AMI models, create modeling documentation, and support product release from concept through production.

Pay and Benefits

Salary: USD 189,300 - 271,500 annually

Perks:Health InsuranceDentalVision401k

Key Requirements

•Bachelor's degree + 12 years of related experience, or Master's + 8 years of related experience, or PhD + 5 years of ASIC link modeling experience
•Proficiency in Python, C/C++, and MATLAB for behavioral model development and automated analysis
•Proven understanding of high-speed communication theory, transmission line theory, SerDes, Ethernet, D2D PHY protocols, and DSP fundamentals
•Demonstrated experience with EDA and SI simulation tools (e.g., Keysight ADS, Synopsys HSPICE, Cadence) and link modeling methodologies
•Analytical, problem-solving, and debugging skills with excellent communication and teamwork abilities

Experience:Silicon photonicsOptical communicationsData center networks

Education:Bachelor's

Skills:CommunicationTeamworkProblem-solving

Tech Stack:PythonC/C++MATLABKeysight ADSSynopsys HSPICECadenceIBIS-AMILinux

Company Brief

Cisco

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1984

Glassdoor: 4.0

Website LinkedIn Glassdoor