Hardware - Senior SoC Design Engineer

FuriosaAI
Seoul
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Cross-team collaboration","Technical communication","Documentation","Systems thinking"]

Own SoC architecture decisions and translate requirements and target performance into micro-architecture and RTL design. Lead subsystem or block-top integration activities, driving timing closure, lint checks, and synthesis while partnering with design verification, physical implementation, and silicon bring-up teams. Support system-level verification and adjust RTL to account for PnR risks. Contribute to coverage goals and cross-team alignment for successful silicon delivery.

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FursaFursa
FuriosaAI
FuriosaAI
1 week ago

Hardware - Senior SoC Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 12 minutes agoStatus: Live

Job Summary

Own SoC architecture decisions and translate requirements and target performance into micro-architecture and RTL design. Lead subsystem or block-top integration activities, driving timing closure, lint checks, and synthesis while partnering with design verification, physical implementation, and silicon bring-up teams. Support system-level verification and adjust RTL to account for PnR risks. Contribute to coverage goals and cross-team alignment for successful silicon delivery.
Location: Seoul
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Determine SoC architecture based on requirements, target performance, and system specifications.
  • •Define micro-architecture and develop RTL design from the defined micro-architecture documentation.
  • •Perform subsystem or block-top integration, including timing closure, lint checks, and synthesis, collaborating with other teams.
  • •Create and share verification plans with the Design Verification team and collaborate to meet coverage goals.
  • •Collaborate with Physical Implementation and Silicon bring-up teams to anticipate PnR issues and participate in system-level verification.

Key Requirements

  • •Bachelor’s degree in Electrical Engineering or Computer Engineering (or related) with 7+ years of RTL design experience, or a Master’s degree with 5+ years of RTL design experience.
  • •Ability to understand requirements, goals for performance, and system specifications to determine SoC architecture.
  • •Experience defining micro-architecture (in document form) and implementing RTL design based on it.
  • •Experience supporting subsystem or block-top integration including timing closure, lint checks, and synthesis.
  • •Familiarity with SoC/system and RTL integration workflows, including verification and collaboration with related teams.
Experience:5+ years
Education:Bachelor's in Electrical Engineering or Computer Engineering (related)
Skills:Cross-team collaborationTechnical communicationDocumentationSystems thinking
Languages:English
Tech Stack:SoCSoC ArchitectureMicro-architectureRTLRTL designBlock-top integrationTiming closureLint checkSynthesisDesign verificationPnRPhysical implementationSilicon bring-upSystem-level verificationEDA toolsVerification coverageFPGA portingAMBA bus protocolBus interfacesClock domain crossing

Company Brief

FuriosaAI
Designs and develops data‑center AI inference accelerators (RNGD) and a full stack hardware‑software platform to deliver energy‑efficient, high‑performance AI compute for enterprise and cloud customers.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Scaleup
Valuation: USD 500M to 1B
Funding: Series C
Headquarters: Seoul, South Korea
Founded: 2017
Glassdoor
Glassdoor: 4.6
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